MPC8358E Freescale Semiconductor, MPC8358E Datasheet
MPC8358E
Available stocks
Related parts for MPC8358E
MPC8358E Summary of contents
Page 1
... Freescale Semiconductor Technical Data MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications This document provides an overview of the MPC8360E/58E ™ PowerQUICC II Pro processor revision 2.x TBGA features, including a block diagram showing the major functional components. This device is a cost-effective, highly integrated communications processor that addresses the needs of the networking, wireless infrastructure and telecommunications markets ...
Page 2
... JTAG/COP QUICC Engine Module Baud Rate Generators Parallel I/O Time Slot Assigner 8 MII/ 8 TDM Ports RMII MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev ™ module provides termination, interworking, and switching Security Engine 32KB D-Cache Power Timers Multi-User ...
Page 3
... Major features of the MPC8360E/58E are as follows: • e300 PowerPC processor core (enhanced version of the MPC603e core) — Operates 667 MHz (for the MPC8360E) and 400 MHz (for the MPC8358E) — High-performance, superscalar processor core — Floating-point, integer, load/store, system register, and branch processing units — ...
Page 4
... POS hardware; microcode must be loaded as an IRAM package – Transparent up to 70-Mbps full-duplex – HDLC up to 70-Mbps full-duplex – HDLC BUS Mbps 1. SMII or SGMII media-independent interface is not currently supported MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Freescale Semiconductor ...
Page 5
... MultiPHY — Two serial peripheral interfaces (SPI); SPI2 is dedicated to Ethernet PHY management — Eight TDM interfaces on the MPC8360E and four TDM interfaces on the MPC8358E with 1-bit mode for E3/T3 rates in clear channel — Sixteen independent baud rate generators and 30 input clock pins for supplying clocks to UCC and MCC serial channels (MCC is only available on the MPC8360E) — ...
Page 6
... On the MPC8360E, the DDR buses can be configured as two 32-bit buses or one 64-bit bus; on the MPC8358E, the DDR bus can be configured as a 32-bit or a 64-bit bus — 32- or 64-bit data interface 333 MHz (for the MPC8360E) and 266 MHz (for the MPC8358E) data rate — ...
Page 7
... Four groups of interrupts with programmable priority — External and internal interrupts directed to communication processor — Redirects interrupts to external INTA pin when in core disable mode — Unique vector number for each interrupt source MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Overview 7 ...
Page 8
... MPC8360E/58E. The device is currently targeted to these specifications. Some of these specifications are independent of the I/O cell, but are included for a more complete reference. These are not purely I/O buffer design specifications. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev interfaces ...
Page 9
... IN REF the PCI interface may overshoot/undershoot according to the PCI Electrical Specification for 3.3-V operation shown in Figure 4. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Table 1. Absolute Maximum Ratings Symbol ...
Page 10
... negative direction. 2. .The operating conditions for junction temperature ° °C. Please refer to General9 in the device errata document. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 2. Recommended Operating Conditions DDR DDR2 2 C, SPI, must track each other and must vary in the same direction— ...
Page 11
... PCI interface of the device for the 3.3-V signals, respectively. Overvoltage Waveform Undervoltage Waveform Figure 4. Maximum AC Waveforms on PCI interface for 3.3-V Signaling MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor + 20 GND Not to Exceed 10% ...
Page 12
... In order to avoid actively driving the I/O pins and to eliminate excessive current draw, apply the core voltage (V ) before the I/O voltage (GV DD MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 3. Output Drive Capability Driver Type Output Impedance (Ω) ...
Page 13
... Core Frequency (MHz) Frequency (MHz) 266 400 533 667 500 MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Figure 5. Power Sequencing Example I/O Voltage (GV Core Voltage ( and not have any ordering requirements with respect to one ...
Page 14
... Typical power is based on a voltage of V application. 3. Thermal solutions will likely need to design to a value higher than typical power on the end application, T power. 4. Maximum power is based on a voltage of V MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev CSB QUICC Engine Typical ...
Page 15
... GMII or TBI Load = 20 pf RGMII or RTBI Other I/O 4 Clock Input Timing This section provides the clock input DC and AC electrical characteristics for the MPC8360E/58E. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Table 6. Estimated Typical I/O Power Dissipation ...
Page 16
... PLL-based devices to track CLKIN drivers with the specified jitter. 5 RESET Initialization This section describes the DC and AC electrical specifications for the reset initialization timing and electrical requirements of the MPC8360E/58E. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 7. CLKIN DC Electrical Characteristics Condition Symbol — ...
Page 17
... CFG_CLKIN_DIV) with respect to negation of PORESET when the device is in PCI agent mode Input hold time for POR config signals with respect to negation of HRESET MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Table 9. RESET Pins DC Electrical Characteristics Symbol ...
Page 18
... Table 12 lists the maximal QE I/O frequencies and the minimal QE core frequency for each interface. Interface Ethernet Management: MDC/MDIO MII MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev — 1 Table 11. PLL and DLL Lock Times Min — ...
Page 19
... Table 13. DDR2 SDRAM DC Electrical Characteristics for GV Parameter/Condition I/O supply voltage I/O reference voltage I/O termination voltage Input high voltage Input low voltage MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Interface Operating Max interface Frequency (MHz) Bit Rate (Mbps) 50 (typ) ...
Page 20
... I/O reference voltage I/O termination voltage Input high voltage Input low voltage Output leakage current Output high current (V OUT Output low current (V OUT MV input leakage current REF MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev VREF ) all times ...
Page 21
... AC timing specifications for the DDR SDRAM interface when GV (typ Table 18. DDR SDRAM Input AC Timing Specifications Mode for GV At recommended operating conditions with GV Parameter AC input low voltage MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor ) all times. DD ...
Page 22
... MCK[n] cycle time, (MCK[n]/MCK[n] crossing) Skew between any MCK to ADDR/CMD ADDR/CMD output setup with respect to MCK ADDR/CMD output hold with respect to MCK MCS(n) output setup with respect to MCK MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev 2.5 V ± 5 ...
Page 23
... AC timing values are based on the DDR data rate, which is twice the DDR memory bus frequency rev2.0 silicon, t maximum meets the specification of 0.6ns. In rev 2.0 silicon, due to errata, t DDKHMH -0.9 ns. Please refer to DDR18 in the device errata document. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor (continued ...
Page 24
... AC test load for the DDR bus. Output Table 21. DDR and DDR2 SDRAM Measurement Conditions Symbol OUT Notes: 1. Data input threshold measurement point. 2. Data output measurement point. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev MCK[n] MCK[n] t MCK t AOSKEW(max) ADDR/CMD CMD t ...
Page 25
... If a heavily loaded system is used, the DLL loop may need to be adjusted to meet setup requirements at the DRAM. 4 devices (12 pF) 9 devices (27 pF) 36 devices (108 pF compensation capacitor 36 devices (108 pF compensation capacitor MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor t MCK t ,t ...
Page 26
... Subsequent bit values are sampled each 16 8 UCC Ethernet Controller: Three-Speed Ethernet, MII Management This section provides the AC and DC electrical characteristics for three-speed, 10/100/1000, and MII management. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 23. DUART DC Electrical Characteristics Symbol V IH ...
Page 27
... Output high voltage Output low voltage Input high voltage Input low voltage Input current MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor UCC Ethernet Controller: Three-Speed Ethernet, MII Management Section 8.3, “Ethernet Management Interface Electrical and Table 26 ...
Page 28
... This symbol is used to represent the external GTX_CLK125 signal and does not follow the original symbol naming convention rev 2.0 silicon, due to errata, t selected. Please refer to QE_ENET18 in the device errata document. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 27. GMII Transmit AC Timing Specifications / OV of 3.3 V ± ...
Page 29
... For example, the subscript of t used with the appropriate letter: R (rise (fall rev 2.0 silicon, due to errata the device errata document. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor UCC Ethernet Controller: Three-Speed Ethernet, MII Management t ...
Page 30
... Note that, in general, the clock reference symbol representation is based on two to three letters representing the clock of a particular functional. For example, the subscript of t (TX) clock. For rise and fall times, the latter convention is used with the appropriate letter: R (rise (fall). MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev ...
Page 31
... For rise and fall times, the latter convention is used with the appropriate letter: R (rise (fall). Figure 12 provides the AC test load. Output MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor UCC Ethernet Controller: Three-Speed Ethernet, MII Management t ...
Page 32
... For example, the subscript of t reference (X) clock. For rise and fall times, the latter convention is used with the appropriate letter: R (rise (fall). MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev ...
Page 33
... RMII (RM) reference (X) clock. For rise and fall times, the latter convention is used with the appropriate letter: R (rise (fall). Figure 15 provides the AC test load. Output MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor UCC Ethernet Controller: Three-Speed Ethernet, MII Management t RMX ...
Page 34
... R (rise (fall). 2. This symbol is used to represent the external GTX_CLK125 and does not follow the original symbol naming convention rev 2.0 silicon, due to errata, t document. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev RMX ...
Page 35
... Setup and hold time of even numbered RCG are measured from riding edge of PMA_RX_CLK1. Setup and hold time of odd numbered RCG are measured from riding edge of PMA_RX_CLK0. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor UCC Ethernet Controller: Three-Speed Ethernet, MII Management ...
Page 36
... Data to clock input skew (at receiver) Clock cycle duration Duty cycle for 1000Base-T Duty cycle for 10BASE-T and 100BASE-TX Rise time (20%–80%) Fall time (20%–80%) GTX_CLK125 reference clock period MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev TRX t t TRXH ...
Page 37
... TX_CLK (At PHY) RXD[8:5][3:0] RXD[7:4][3:0] RX_CTL RX_CLK (At PHY) Figure 19. RGMII and RTBI AC Timing and Multiplexing Diagrams MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor UCC Ethernet Controller: Three-Speed Ethernet, MII Management of 2.5 V ± 5 G125H G125 represents the TBI (T) receive (RX) clock ...
Page 38
... MDC frequency MDC period MDC clock pulse width high MDC to MDIO delay MDIO to MDC setup time MDIO to MDC hold time MDC rise time MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Section 8.1, “Three-Speed Ethernet Controller Table 36. Symbol Conditions OV — ...
Page 39
... IEEE Std. 1588 timer AC specifications. Parameter Timer clock cycle time Input Setup to timer clock Input Hold from timer clock Output clock to output valid MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor UCC Ethernet Controller: Three-Speed Ethernet, MII Management 1 Symbol Min t — ...
Page 40
... LUPWAIT Input hold from local bus clock LALE output fall to LAD output transition (LATCH hold time) LALE output fall to LAD output transition (LATCH hold time) MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 38. 1588 Timer AC Specifications (continued) ...
Page 41
... LALE output fall to LAD output transition (LATCH hold time) LALE output fall to LAD output transition (LATCH hold time) LALE output fall to LAD output transition (LATCH hold time) Local bus clock to output valid MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Symbol t ...
Page 42
... DLL bypass mode is not recommended for use at frequencies above 66MHz. Figure 21 provides the AC test load for the local bus. Output MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Symbol t LBKHOZ ...
Page 43
... LSDCAS/LSDDQM[0:3] LA[27:31]/LBCTL/LBCKE/LOE/ Output (Data) Signals: LAD[0:31]/LDP[0:3] Output (Address) Signal: LAD[0:31] Figure 22. Local Bus Signals, Nonspecial Signals Only (DLL Enabled) MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor show the local bus signals. t LBIVKH t t LBKHOX ...
Page 44
... UPM Mode Input Signal: LUPWAIT Input Signals: LAD[0:31]/LDP[0:3] UPM Mode Output Signals: LCS[0:3]/LBS[0:3]/LGPL[0:5] Figure 24. Local Bus Signals, GPCM/UPM Signals for LCCR[CLKDIV (DLL Enabled) MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev LCLK[n] t LBIVKH LGTA t ...
Page 45
... Input Signals: LAD[0:31]/LDP[0:3] (DLL Bypass Mode) UPM Mode Output Signals: LCS[0:3]/LBS[0:3]/LGPL[0:5] Figure 25. Local Bus Signals, GPCM/UPM Signals for LCCR[CLKDIV (DLL Bypass Mode) MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor LCLK LBKHOZ ...
Page 46
... LUPWAIT Input Signals: LAD[0:31]/LDP[0:3] (DLL Bypass Mode) UPM Mode Output Signals: LCS[0:3]/LBS[0:3]/LGPL[0:5] Figure 26. Local Bus Signals, GPCM/UPM Signals for LCCR[CLKDIV (DLL Bypass Mode) MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev LCLK ...
Page 47
... DC electrical characteristics for the IEEE Std. 1149.1 (JTAG) interface of the device. Characteristic Output high voltage Output low voltage Output low voltage Input high voltage Input low voltage Input current MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor LBKHOZ1 ...
Page 48
... TRST is an asynchronous level sensitive signal. The setup time is for test purposes only. 4. Non-JTAG signal input timing with respect Non-JTAG signal output timing with respect Guaranteed by design and characterization. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 2). ...
Page 49
... JTAG External Clock Boundary Data Inputs Boundary Data Outputs Boundary Data Outputs MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor = 50 Ω Figure 28. AC Test Load for the JTAG Interface ...
Page 50
... JTAG External Clock TDI, TMS TDO TDO This section describes the DC and AC electrical characteristics for the I MPC8360E/58E. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev JTIVKH t JTKLOV t JTKLOX t JTKLOZ ...
Page 51
... Hold time (repeated) START condition (after this period, the first clock pulse is generated) Data setup time Data hold time: Rise time of both SDA and SCL signals MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor 2 Table 44 Electrical Characteristics of 3.3 V ± ...
Page 52
... Figure 34 shows the AC timing diagram for the I SDA t I2CF t I2CL SCL t I2SXKL S MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 45 Electrical Specifications (continued) (max) levels (see Table 44). Symbol t t (first two letters of functional block)(reference)(state)(signal)(state) ...
Page 53
... Parameter Clock to output valid Output hold from Clock Clock to output high impedance Input setup to Clock MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Table 46. PCI DC Electrical Characteristics Symbol Test Condition ≥ ...
Page 54
... Input timings are measured at the pin rev 2.0 silicon, due to errata, t Figure 35 provides the AC test load for PCI. Output MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Symbol t PCIXKH ...
Page 55
... DC electrical characteristics for the device timer pins, including TIN, TOUT, TGATE and RTC_CLK. Characteristic Output high voltage Output low voltage Output low voltage Input high voltage Input low voltage Input current MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor CLK t PCIVKH Input CLK t PCKHOV Output Table 49 ...
Page 56
... Output low voltage Output low voltage Input high voltage Input low voltage Input current Note: This specification applies when operating from 3.3V supply. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 50. Timers Input AC Timing Specifications Characteristic = 50 Ω Figure 38 ...
Page 57
... Output low voltage Notes: 1. This table applies for pins IRQ[0:7], IRQ_OUT, MCP_OUT, and CE ports Interrupts. 2. IRQ_OUT and MCP_OUT are open drain pins, thus V MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Table 52. GPIO Input AC Timing Specifications Characteristic = 50 Ω ...
Page 58
... SPI outputs—Slave mode (external clock) delay SPI inputs—Master mode (internal clock) input setup time SPI inputs—Master mode (internal clock) input hold time MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 54. IPIC Input AC Timing Specifications Characteristic when working in edge triggered mode ...
Page 59
... Note) Note: The clock edge is selectable on SPI. Figure 41. SPI AC Timing in Slave mode (External Clock) Diagram MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Table 56. SPI AC Timing Specifications (first two letters of functional block)(reference)(state)(signal)(state Ω ...
Page 60
... TDM/SI input and output AC timing specifications. Characteristic TDM/SI outputs—External clock delay TDM/SI outputs—External clock high impedance TDM/SI inputs—External clock input setup time MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev NIIXKH t NIIVKH ...
Page 61
... TDM/SI (See Note) Output Signals: TDM/SI (See Note) Note: The clock edge is selectable on TDM/SI MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor (first two letters of functional block)(reference)(state)(signal)(state Ω Figure 43. TDM/SI AC Test Load Table 56 ...
Page 62
... In rev 2.0 silicon, due to errata, t refer to QE_UPC3 in the device errata document. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 59. UTOPIA DC Electrical Characteristics Symbol Condition ...
Page 63
... HDLC, BISYNC, Transparent, and Synchronous UART This section describes the DC and AC electrical specifications for the high level data link control (HDLC), BiSync, transparent, and synchronous UART protocols of the MPC8360E/58E. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor = 50 Ω ...
Page 64
... The symbols used for timing specifications follow the pattern of t for inputs and t (reference)(state) t symbolizes the outputs internal timing (HI) for the time t HIKHOX state (H) until outputs (O) are invalid (X). MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Symbol Condition –2.0 mA ...
Page 65
... Figure 50 represent the AC timing from specifications generally reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge is the active edge. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Symbol t UAIKHOV ...
Page 66
... Note: The clock edge is selectable. Figure 50 shows the timing with internal clock. Serial CLK (output) Input Signals: (See Note) Output Signals: (See Note) Note: The clock edge is selectable. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev HEIXKH t HEIVKH t HEKHOV t HEKHOX Figure 49 ...
Page 67
... RXP, RXN, and RXD USRSPND (PND). Also, t USTSPN TXN (PN). 2.Skew measurements are done at OV MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Table 64. USB DC Electrical Characteristics Symbol V IH ...
Page 68
... The package parameters for rev 2.0 silicon are as provided in the following list. The package type is 37.5 mm × 37.5 mm, 740 tape ball grid array (TBGA). Package outline Interconnects Pitch Module height (typical) Solder Balls Ball diameter (typical) MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Ω Ω Figure 51. USB AC Test Load Section 21.1, “ ...
Page 69
... Mechanical Dimensions of the TBGA Package Figure 52 depicts the mechanical dimensions and bottom surface nomenclature of the device, 740-TBGA package. Figure 52. Mechanical Dimensions and Bottom Surface Nomenclature of the TBGA Package MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Package and Pin Listings 69 ...
Page 70
... MEMC1_MCS[2:3]/ MEMC2_MCS[0:1] MEMC1_MCKE[0:1] MEMC1_MCK[0:1] MEMC1_MCK[2:3]/ MEMC2_MCK[0:1] MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 66. MPC8360E TBGA Pinout Listing Package Pin Number Primary DDR SDRAM Memory Controller Interface AJ34, AK33, AL33, AL35, AJ33, AK34, AK32, AM36, AN37, AN35, AR34, AT34, AP37, AP36, AR36, AT35, ...
Page 71
... CE_PG[23:0] PCI_C/ BE[3:0]/ CE_PF[10:7] PCI_PAR/ CE_PF[11] PCI_FRAME/ CE_PF[12] PCI_TRDY/ CE_PF[13] MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Table 66. MPC8360E TBGA Pinout Listing (continued) Package Pin Number AN25, AK1 AL37, AT36 AP2, AT2 AN24 AL1 AH6, AP30 ...
Page 72
... CE_PF[4] LAD[0:31] LDP[0]/ CKSTOP_OUT LDP[1]/ CKSTOP_IN LDP[2]/ LCS[6] LDP[3]/ LCS[7] LA[27:31] LCS[0:5] MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 66. MPC8360E TBGA Pinout Listing (continued) Package Pin Number C28 B28 E26 F22 B29 A29 F19 A21 C21 ...
Page 73
... IRQ[1]/ M1SRCID[4]/ M2SRCID[4]/ LSRCID[4] IRQ[2]/ M1DVAL/ M2DVAL/ LDVAL IRQ[3]/ CORE_SRESET MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Table 66. MPC8360E TBGA Pinout Listing (continued) Package Pin Number AG35, AG34, AH36, AE32 AD35 M37 AB32 AE37 AC33 ...
Page 74
... CE_PA[1:2] CE_PA[3:7] CE_PA[8] CE_PA[9:12] CE_PA[13:14] CE_PA[15] CE_PA[16] CE_PA[17:21] CE_PA[22] CE_PA[23:26] CE_PA[27:28] MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 66. MPC8360E TBGA Pinout Listing (continued) Package Pin Number G33, G32 E35 H36 DUART E32 B34 C34 A35 ...
Page 75
... TDI TDO TMS TRST TEST TEST_SEL QUIESCE MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Table 66. MPC8360E TBGA Pinout Listing (continued) Package Pin Number B19 AE5 F16 AE2, AE1, AD5, AD3, AD2, AC6, AC5, AC4, AC2, AC1, ...
Page 76
... GND MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 66. MPC8360E TBGA Pinout Listing (continued) Package Pin Number System Control L37 L36 M33 Thermal Management AP19 AT31 Power and Ground Signals K35 ...
Page 77
... MVREF1 MVREF2 SPARE1 SPARE3 SPARE4 SPARE5 MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Table 66. MPC8360E TBGA Pinout Listing (continued) Package Pin Number C17, D16 B18, E21 C36, D29, D35, E16, F9, F12, F15, F17, F18, F20, F21, ...
Page 78
... MEMC_MBA[0:1] MEMC_MBA[2] MEMC_MA[0:14] MEMC_MODT[0:3] MEMC_MWE MEMC_MRAS MEMC_MCAS MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 66. MPC8360E TBGA Pinout Listing (continued) Package Pin Number AM20, AU19 Table 67. MPC8358E TBGA Pinout Listing Package Pin Number DDR SDRAM Memory Controller Interface ...
Page 79
... CE_PF[17] PCI_SERR/ CE_PF[18] PCI_PERR/ CE_PF[19] PCI_REQ[0]/ CE_PF[20] MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Table 67. MPC8358E TBGA Pinout Listing (continued) Package Pin Number AU27, AT27, AU8, AU7 AL32, AU33 AK37, AT37, AN1, AR2, AN25, AK1 ...
Page 80
... LBCTL LALE LGPL0/ LSDA10/ cfg_reset_source0 LGPL1/ LSDWE/ cfg_reset_source1 LGPL2/ LSDRAS/ LOE MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 67. MPC8358E TBGA Pinout Listing (continued) Package Pin Number A21 C21 E20 B20 C20 D36 B37 Local Bus Controller Interface ...
Page 81
... IRQ[4:5] IRQ[6]/ LCS[6]/ CKSTOP_OUT IRQ[7]/ LCS[7]/ CKSTOP_IN UART1_SOUT/ M1SRCID[0]/ M2SRCID[0]/ LSRCID[0] MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Table 67. MPC8358E TBGA Pinout Listing (continued) Package Pin Number AD34 AE35 AF36 G36 J33 J34 G37 F34 ...
Page 82
... CE_PA[22] CE_PA[23:26] CE_PA[27:28] CE_PA[29] CE_PA[30] CE_PA[31] CE_PB[0:27] CE_PC[0:1] CE_PC[2:3] CE_PC[4:6] CE_PC[7] CE_PC[8:9] MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 67. MPC8358E TBGA Pinout Listing (continued) Package Pin Number B34 C34 A35 Interface D34 B35 E33 ...
Page 83
... PORESET HRESET SRESET THERM0 THERM1 MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Table 67. MPC8358E TBGA Pinout Listing (continued) Package Pin Number T5, T4, T2, T1, R5, R3, R1, C11, D12, F13, B10, C10, E12, A9, B8, D10, A14, E15, B14, D15, AH2 ...
Page 84
... GND MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 67. MPC8358E TBGA Pinout Listing (continued) Package Pin Number Power and Ground Signals K35 K36 AM29 K37 A2, A8, A13, A19, A22, A25, A31, A33, A36, B7, B12, ...
Page 85
... MVREF1 MVREF2 SPARE1 SPARE3 SPARE4 SPARE5 MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Table 67. MPC8358E TBGA Pinout Listing (continued) Package Pin Number B18, E21 C36, D29, D35, E16, F9, F12, F15, F17, F18, F20, F21, F23, F25, F26, F29, F31, F32, F33, G6, J6, K32, M32, ...
Page 86
... This pin must always be tied recommended that MDIC0 be tied to GND using an 18.2 Ω resistor and MDIC1 be tied to DDR power using an 18.2 Ω resistor for DDR2. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 67. MPC8358E TBGA Pinout Listing (continued) ...
Page 87
... Figure 53 shows the internal distribution of clocks within the MPC8360E. MPC8360E ce_clk to QUICC Engine block QUICC Engine PLL CFG_CLKIN_DIV CLKIN MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor e300 core Core PLL csb_clk DDRC1 ddr1_clk DDRC2 Clock ...
Page 88
... CLKIN or CLKIN/2 is driven out on the PCI_SYNC_OUT signal. The OCCR[PCICDn] parameters select whether CLKIN or CLKIN/2 is driven out on the PCI_CLK_OUTn signals.The OCCR[PCIOENn] parameters enable the PCI_CLK_OUTn respectively. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev e300 core ...
Page 89
... Note that lb_clk is not the external local bus or DDRC2 frequency; lb_clk passes through the a LB clock divider to create the external local bus clock outputs (LSYNC_OUT and LCLK[0:2]). The LB clock divider ratio is controlled by LCCR[CLKDIV]. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Clocking ...
Page 90
... The DDR data rate is 2x the DDR memory bus frequency. 5 The local bus frequency is 1/2, 1/4, or 1/8 of the lb_clk frequency (depending on LCCR[CLKDIV]) which is in turn the csb_clk frequency (depending on RCWL[LBCM]). MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 68 specifies which units have a configurable clock Table 68 ...
Page 91
... The VCO divider must be set properly so that the system VCO frequency is in the range of 600-1400 MHz. The system VCO frequency is derived from the following equations: csb_clk = {PCI_SYNC_IN × CFG_CLKIN_DIV)} × SPMF MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Table 70. System PLL Multiplication Factors System PLL Multiplication ...
Page 92
... Low Low Low Low Low Low Low Low Low MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev “Clocking,” the LBCM, DDRCM, and SPMF parameters in the reset Table 72. CSB Frequency Options csb_clk : SPMF Input Clock 2 Ratio 0010 ...
Page 93
... Table 73 in Table 73 should be considered reserved. RCWL[COREPLL] 0-1 2-5 nn 0000 00 0001 01 0001 MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Table 72. CSB Frequency Options (continued) csb_clk : SPMF Input Clock 16.67 2 Ratio 0010 0011 0100 ...
Page 94
... MHz. Having a core frequency below the CSB frequency is not a possible option because the core frequency must be equal to or greater than the CSB frequency. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 73. e300 Core PLL Configuration (continued) ...
Page 95
... MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Table 74. QUICC Engine PLL Multiplication Factors QUICC Engine PLL Multiplication RCWL[CEPDF ...
Page 96
... Notes 1. Reserved modes are not listed. The RCWL[CEVCOD] denotes the QE PLL VCO internal frequency as shown in MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev QUICC Engine PLL Multiplication RCWL[CEPDF] Factor = RCWL[CEPMF ...
Page 97
... MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor NOTE shows suggested PLL configurations for 33 MHz and 66 MHz input clocks Section 22, “Clocking,” for the appropriate operating frequencies for your Table 76. Suggested PLL Configurations ...
Page 98
... Choose the up or down sections in the table according to input clock rate 33 MHz or 66 MHz. 2. Select a suitable CSB and core clock rates from configuration bits. 3. Select a suitable QUICC Engine clock rate from configuration bits. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev Table 76. Suggested PLL Configurations (continued) Input CSB Freq ...
Page 99
... Junction-to-ambient (@ 1 m/s) on four layer board (2s2p) Junction-to-ambient (@ 2 m/s) on single layer board (1s) Junction-to-ambient (@ 2 m/s) on four layer board (2s2p) Junction-to-board thermal Junction-to-case thermal MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Input Clock CSB Freq (MHz) ...
Page 100
... The thermal performance of a device cannot be adequately predicted from the junction to ambient thermal resistance. The thermal performance of any component is strongly dependent on the power dissipation of surrounding components. In addition, the ambient temperature varies widely within the application. For MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 100 Characteristic ...
Page 101
... In some application environments, a heat sink will be required to provide the necessary thermal management of the device. When a heat sink is used, the thermal resistance is expressed as the sum of a junction to case thermal resistance and a case to ambient thermal resistance: R where: MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor × θ ...
Page 102
... Simplified thermal models of the packages can be assembled using the junction-to-case and junction-to-board thermal resistances listed in the thermal resistance table. More detailed thermal models can be made available on request. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 102 = junction to ambient thermal resistance (°C/W) θ ...
Page 103
... Dow-Corning Corporation Dow-Corning Electronic Materials 2200 W. Salzburg Rd. Midland, MI 48686-0997 Internet: www.dowcorning.com Shin-Etsu MicroSi, Inc. 10028 S. 51st St. Phoenix, AZ 85044 Internet: www.microsi.com MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor 603-224-9988 408-749-7601 818-842-7277 408-436-8770 800-522-6752 603-635-5102 781-935-4850 800-248-2481 ...
Page 104
... System Design Information This section provides electrical and thermal design recommendations for successful application of the MPC8360E/58E. Additional information can be found in AN3097, MPC8360E/MPC8358E PowerQUICC™ Design Checklist, Rev. 1. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 104 × θ ...
Page 105
... Therefore recommended that the system designer place at least one decoupling capacitor at each V decoupling capacitors should receive their power from separate V MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor 1) generates the platform clock from the externally supplied CLKIN DD Section 22.1, “ ...
Page 106
... When data is held high, SW1 is closed (SW2 is open) and R OV /2. R then becomes the resistance of the pull-up devices other in value. Then MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 106 , and LV planes, to enable quick recharging of the smaller chip ...
Page 107
... These pins are generally used as output only pins in normal operation. While HRESET is asserted however, these pins are treated as inputs. The value presented on these pins while HRESET is asserted, is latched when HRESET deasserts, at which time the input receiver is disabled MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor R ...
Page 108
... Freescale sales office. In addition to the processor frequency, the part numbering scheme also includes an application modifier which may specify special application conditions. Each part number also contains a revision code which refers to the die mask revision number. MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 108 Table 80. Document Revision History ...
Page 109
... Additionally, parts addressed by Part Number Specifications may support other maximum core frequencies. Table 82 shows the SVR settings by device and package type. Device MPC8360E MPC8360 MPC8358E MPC8358 MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor Table 81. Part Numbering Nomenclature Temperature Processor 2 ...
Page 110
... Ordering Information MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 110 THIS PAGE INTENTIONALLY LEFT BLANK Freescale Semiconductor ...
Page 111
... MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2 Freescale Semiconductor THIS PAGE INTENTIONALLY LEFT BLANK Ordering Information 111 ...
Page 112
... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer ...