TS83102G0B ATMEL Corporation, TS83102G0B Datasheet - Page 43

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TS83102G0B

Manufacturer Part Number
TS83102G0B
Description
10-bit 2 GSPS ADCthis State-of-the-art 10-bit 2 GSPS Converter Offers an Unprecedented Bandwidth of 3.3 GHZ And Excellent Band Flatness, Allowing to Directly Digitize Very High if Signals (2nd And 3rd Nyquist Zones) With High Linearity : The SFDR Rem
Manufacturer
ATMEL Corporation
Datasheet

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VPLUSD Digital Power
Supply Settings
ECL Differential
Output Termination
Configurations
2101C–BDC–02/04
See the recommended termination scenarios in Figures 46. and 47. below.
Note:
If used with the TS81102G0 DMUX, V
Figure 46. 50 Ω Terminated Differential Outputs (Recommended)
Figure 47. Unterminated Differential Outputs (Optional)
50 Ω
For differential ECL digital output levels: V
connected to ground via a 5 Ω resistor to ensure the -0.8 voltage drop).
For the LVDS digital output logic compatibility: V
(±75 mV).
50 Ω
VPLUSD = - 0.8V
VPLUSD = -0.8V
Since the output buffers feature a 100 Ω differential output impedance, it is possible to directly
drive high the input impedance storing registers without terminating the 50 Ω transmission lines.
Timewise, this means that the incident wave reflects at the 50 Ω transmission line output and
travels back to the 50 Ω data output buffer. Since the buffer output impedance is 50 Ω, no
back reflection occurs and the output swing is doubled.
10.5 mA
10.5 mA
50 Ω
50 Ω
Zc = 50 Ω
Zc = 50 Ω
Zc = 50 Ω
Zc = 50 Ω
50 Ω
PLUSD
can be set to ground.
PLUSD
should be supplied with -0.8V (or
47 pF
PLUSD
50 Ω
should be tied to 1.45V
OUTB
OUT
OUTB
OUT
TS83102G0B
VOL typ = -1.17V
VOH typ = -0.94V
Differential Output Swing:
±0.23V = 0.46 Vpp
Common Mode Level = -1.05V
VOL typ = -1.4V
VOH typ = -0.94V
Differential Output Swing:
±0.46V = 0.92 Vpp
Common Mode Level = -1.17V
43

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