PIC18LF8720 Microchip Technology, PIC18LF8720 Datasheet - Page 48

no-image

PIC18LF8720

Manufacturer Part Number
PIC18LF8720
Description
(PIC18LF6620/6520/8520/6620/8620/6720/8720) 64/80-Pin High-Performance / 64-Kbyte Enhanced Flash Microcontrollers
Manufacturer
Microchip Technology
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF8720-I/PT
Manufacturer:
Vishay
Quantity:
9 195
Part Number:
PIC18LF8720-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18LF8720-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC18LF8720-I/PTC01
Manufacturer:
MICROCH
Quantity:
20 000
Part Number:
PIC18LF8720T-I/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
PIC18LF8720T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F6520/8520/6620/8620/6720/8720
4.7.1
The PIC18FXX20 devices have four two-word instruc-
tions: MOVFF, CALL, GOTO and LFSR. The second word
of these instructions has the 4 MSBs set to ‘1’s and is
a special kind of NOP instruction. The lower 12 bits of
the second word contain data to be used by the instruc-
tion. If the first word of the instruction is executed, the
data in the second word is accessed. If the second
EXAMPLE 4-3:
4.8
Look-up tables are implemented two ways. These are:
• Computed GOTO
• Table Reads
4.8.1
A computed GOTO is accomplished by adding an offset
to the program counter (ADDWF PCL).
A look-up table can be formed with an ADDWF PCL
instruction and a group of RETLW 0xnn instructions.
WREG is loaded with an offset into the table before
executing a call to that table. The first instruction of the
called routine is the ADDWF PCL instruction. The next
instruction executed will be one of the RETLW 0xnn
instructions, that returns the value 0xnn to the calling
function.
The offset value (value in WREG) specifies the number
of bytes that the program counter should advance.
In this method, only one data byte may be stored in
each instruction location and room on the return
address stack is required.
DS39609B-page 46
CASE 1:
Object Code
CASE 2:
Object Code
0110 0110 0000 0000
1100 0001 0010 0011
1111 0100 0101 0110
0010 0100 0000 0000
0110 0110 0000 0000
1100 0001 0010 0011
1111 0100 0101 0110
0010 0100 0000 0000
Look-up Tables
TWO-WORD INSTRUCTIONS
COMPUTED GOTO
TWO-WORD INSTRUCTIONS
Source Code
TSTFSZ
MOVFF
Source Code
TSTFSZ
ADDWF
ADDWF
MOVFF
REG1
REG1, REG2 ; No, execute 2-word instruction
REG3
REG1
REG1, REG2 ; Yes
REG3
; is RAM location 0?
; 2nd operand holds address of REG2
; continue code
; is RAM location 0?
; 2nd operand becomes NOP
; continue code
word of the instruction is executed by itself (first word
was skipped), it will execute as a NOP. This action is
necessary when the two-word instruction is preceded
by a conditional instruction that changes the PC. A pro-
gram example that demonstrates this concept is shown
in Example 4-3. Refer to Section 24.0 “Instruction
Set Summary” for further details of the instruction set.
4.8.2
A better method of storing data in program memory
allows 2 bytes of data to be stored in each instruction
location.
Look-up table data may be stored 2 bytes per program
word by using table reads and writes. The Table Pointer
(TBLPTR) specifies the byte address and the Table
Latch (TABLAT) contains the data that is read from, or
written to program memory. Data is transferred to/from
program memory, one byte at a time.
A description of the table read/table write operation is
shown in Section 5.0 “Flash Program Memory”.
TABLE READS/TABLE WRITES
 2004 Microchip Technology Inc.

Related parts for PIC18LF8720