MT9M019 Aptina Imaging Corporation, MT9M019 Datasheet - Page 35

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MT9M019

Manufacturer Part Number
MT9M019
Description
1/5-Inch 1.3Mp CMOS Digital Image Sensor
Manufacturer
Aptina Imaging Corporation
Datasheet
Figure 20:
Low Power Mode
PDF: 7723845879/Source:2828556980
MT9D019_DS - Rev. F 5/10 EN
LED Flash Enabled Following Forced Restart
The sensor supports a low-power mode by programming a sequence of registers:
Programming this sequence will change the min_line_pck. It is important that the
line_length_pck formula in Table 5 on page 14 is upheld at all times.
line_length_pck <=((x_addr_end - x_addr_start + 1)/xskip) + min_line_blanking_pck
Setting read _mode[9] bit will result in the following:
• Double the value of pc_speed[2:0] internally. This means halving the internal pixel
• Replace analog DAC settings with low power settings.
Please be aware of the following fine_integration_time limits:
fine_integration_time_min(R0x1008–9) = 0xF0
fine_integration_time_max_margin (R0x100A–B) = 0x7A
The slower pixel clock provides more time for settling in the analog domain, thus, the
low power DAC values can be approximately half the full power DAC values.
Enabling the low-power mode will not put the sensor in subsampling mode; this has to
be programmed separately. Low power is independent of the readout mode, and can
also be enabled in full resolution mode. However, since the pixel clock speed is halved,
the frame rates that can be achieved with low power mode are lower than in full power
mode.
Only internal pixel clock speeds of 1, 2, and 4 are supported; therefore, low power mode
combined with pc_speed[2:0] = 4 is an illegal combination.
Any limitations related to changing the internal pixel clock speed will also apply to low
power mode since it automatically changes the pixel clock speed. SMIA limiter registers
therefore need to be reprogrammed by the host to match the new internal pixel clock
frequency.
State of Triggered Bit
Set Read Mode register bit 9 (R0x3040–1[9]) = 1
Set Fine Correction register (R0x3010–1) = 0x52
clock frequency.
(R0x3046-7[14])
FRAME VALID
Flash STROBE
Flash enabled
and a restart
triggered
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35
frame
MT9M019: 1/5-Inch 1.3Mp CMOS Digital Image Sensor
Good frame
Aptina reserves the right to change products or specifications without notice.
Good frame
©2006 Aptina Imaging Corporation. All rights reserved.
Flash disabled
and a restart
triggered
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frame
Features

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