IDT7216L Integrated Device Technology, IDT7216L Datasheet - Page 5

• Manufacturer Part Number: IDT7216L
• Description: 16 X 16 Parallel Cmos Multipliers
• Manufacturer: Integrated Device Technology

IDT7216L, IDT7217L
16 x 16 PARALLEL CMOS MULTIPLIERS
PIN DESCRIPTIONS
ABSOLUTE MAXIMUM RATINGS
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
Symbol
V
V
T
T
T
I
OUT
X
Y
P
P
OEL
OEP
X
RND
MSPSEL
FA
FT
CLK
CLKX
CLKY
CLKL
CLKM
ENX
ENY
A
BIAS
STG
CC
TERM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
0
0 -
0
16
M,
Pin Name
- X
- P
Y
- P
Y
M
15
15
15
31
/
Power Supply
Voltage
Terminal Voltage
with Respect to
GND
Operating
Temperature
Temperature
Under Bias
Storage
Temperature
DC Output
Current
Rating
I/O
I/O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Data Inputs
Y
P
Data Output (LSP or MSP)
Output enable control for LSP (least significant product). When low enables P
tristated.
Output enable control for MSP (most significant product). When low enables P
P
Mode control for each data word. Low designates unsigned data input and high designates two's
complement.
"Round" control for rounding of MSP. When high, 1 is added to the most significant bit of LSP. This
signal is affected by the state of FA pin. When FA = 1 and RND = 1, 1 is added to the 2
RND = 1 and FA = 0, 1 is added to the 2
rising edge of the logical OR of CLKX and CLKY in the 7216 and on the rising edge of CLK in the 7217.
Rounding always occurs in the positive direction which may introduce a systematic bias.
When low, MSP is output on P
Format adjust control. When high, a full 32 bit product is selected. When low, a left shifted 31 bit product
is selected with the sign bit replicated in the LSP. FA is normally high, except for certain fractional two's
complement applications (see multiplier input / output formats).
Flow through control. When high, both MSP and LSP registers are by-passed.
7217 X, Y, RND, LSP and MSP register clock input.
7216 X register clock input. Also clocks RND register.
7216 Y register clock input. Also clocks RND register.
7216 LSP register clock input.
7216 MSP register clock input.
7217 X register clock enable. Also enables RND register clock.
7217 Y register clock enable. Also enables RND register clock.
0 -
0
31
Commercial
–0.5 to +7.0
–55 to +125
–55 to +125
- P
V
Y
tristated.
0 to +70
CC
15
15
50
are LSP register output, enabled when
+ 0.5
are data inputs
(1)
–0.5 to +7.0
–55 to +125
–65 to +135
–65 to +150
V
Military
CC
50
+ 0.5
2580 tbl 01
16
Unit
mA
- P
V
V
C
C
C
31
11.3
lines. When high, LSP is output on P
CAPACITANCE
NOTE:
1. This parameter is measured at characterization and not tested.
-16
Symbol
C
C
IN
OUT
bit (P
Description
OEL
14
). The RND input is registered. It is clocked on the
Input Capacitance
Output Capacitance
= 0
MILITARY AND COMMERCIAL TEMPERATURE RANGES
Parameter
(T
A
= +25 C, f = 1.0 MHz)
(1)
16
- P
0
16
Conditions
V
- P
V
31.
- P
OUT
IN
15
31.
= 0V
. When high P
= 0V
When high P
-15
bit (P
Max. Unit
10
12
15
). When
0
2580 tbl 04
16
- P
pF
pF
5
-
15