IDT70824 Integrated Device Technology, IDT70824 Datasheet - Page 19
IDT70824
Manufacturer Part Number
IDT70824
Description
4k X 16 Saram? Sequential Access / Random Access Memory
Manufacturer
Integrated Device Technology
Datasheet
1.IDT70824.pdf
(21 pages)
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Sequential Counter Enable Cycle After Reset, Write Cycle
Sequential Counter Enable Cycle After Reset, Read Cycle
NOTES:
1. 'D0' represents data input for Address = 0, 'D1' represents data input for Address = 1, etc.
2. If CNTEN = V
3. Data output is available at a t
4. SCE = V
5. If CNTEN=V
6. SR/W = V
SI/O
CNTEN
CNTEN
IDT70824S/L
High-Speed 4K x 16 Sequential Access Random Access Memory
SCLK
SR/W
SI/O
SCLK
RST
RST
OUT
IN
IL
IL
throughout all cycles.
.
IL
IL
then 'D1' would be clocked out (read) at this point.
then 'D1' would be written into 'A1' at this point.
CD
after the SR/W = V
D0
(2)
(3)
(5)
IH
is clocked. The RST sets SR/W = LOW internally and therefore disables the output until the next clock.
D0
D1
(5)
6.42
19
D1
D2
Military and Commercial Temperature Ranges
D2
D3
(1,4)
(1,4,6)
D3
D4
3099 drw 24
3099 drw 23