IDT82V3012 Integrated Device Technology, IDT82V3012 Datasheet - Page 10

• Manufacturer Part Number: IDT82V3012
• Description: T1/e1/oc3 Wan Pll With Dual Reference Inputs
• Manufacturer: Integrated Device Technology

2
inputs, providing timing (clock) and synchronization (framing) signals to
interface circuits for multitrunk T1/E1 and STS3/OC3 links. The details
are described in the following sections.
2.1
used to control the TIE block and the DPLL block as shown in
The control is based on the result of Invalid Input Signal Detection and
the logic levels on the MODE_sel0, MODE_sel1, IN_sel and TIE_en
pins.
Holdover and Freerun. The operating mode is selected by the
MODE_sel1 and MODE_sel0 pins, as shown in
synchronously on the rising edge of F8o. Three operating modes,
Normal (S1), Holdover (S3) and Freerun (S0) can be switched from one
to another by changing the logic levels on the MODE_sel0 and
MODE_sel1 pins.
Functional Description
IDT82V3012
The IDT82V3012 is a T1/E1/OC3 WAN PLL with dual reference
The State Control Circuit is an important part in the IDT82V3012. It is
The IDT82V3012 can be operated in three different modes: Normal,
Figure - 3
FUNCTIONAL DESCRIPTION
STATE CONTROL CIRCUIT
shows the state control diagram. All state changes occur
* Note: After reset, the Mode_sel1 and Mode_sel0 should be initially set to '10' or '00'.
Mode_sel1 = 0
Mode_sel0 = 0
Normal
S1
Table - 1.
Figure - 3 State Control Diagram
Figure - 2.
(Invalid Input Reference Signal)
(Valid Input Reference Signal)
(Valid Input Reference Signal)
Short Time Holdover
TIE Enable (TIE_en = H)
TIE Disable (TIE_en = L)
Mode_sel1 = 1
Mode_sel0 = 0
Mode_sel1 = 0
Mode_sel0 = 0
Mode_sel1 = 0
Mode_sel0 = 1
Auto TIE Disable
Holdover
Freerun
Reset *
10
S0
S3
S4
Table - 1 Operating Modes Selection
Signal Detection
MODE_sel1
Output of the
T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS
Invalid Input
0
0
1
1
Mode Selection Pins
Figure - 2 State Control Circuit
IN_sel
MODE_sel0
Enable/Disable
TIE Block
0
1
0
1
TIE_en
State Control Circuit
Auto - Holdover
Mode_sel1 = 0
Mode_sel0 = 0
MODE_sel1
S2
Mode Control
DPLL Block
Operating Mode
Reserved
Holdover
Freerun
Normal
MODE_sel0
May 24, 2006
F8o