MCP1726T-ADJZEMF Microchip Technology, MCP1726T-ADJZEMF Datasheet - Page 41

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MCP1726T-ADJZEMF

Manufacturer Part Number
MCP1726T-ADJZEMF
Description
Regulator, Extended Industrial, HVSON, 8-Pin|
Manufacturer
Microchip Technology
Datasheet
4.2.4.5
Figure 4-6 shows the diagram for this pin. The GP4 pin
is configurable to function as one of the following:
• a general purpose I/O
• an analog input for the A/D
• a TMR1 gate input
• a crystal/resonator connection
• a clock output
FIGURE 4-6:
 2003 Microchip Technology Inc.
DATA BUS
TRISIO
TRISIO
INTERRUPT-ON-
GPIO
GPIO
WPU
WPU
IOC
IOC
Note 1: CLK modes are XT, HS, LP, LPTMR1 and CLKOUT
WR
WR
WR
WR
RD
RD
RD
RD
CHANGE
2: With CLKOUT option.
Enable.
D
D
D
D
TO T1G
TO A/D CONVERTER
CK
CK
CK
CK
GP4/AN3/T1G/OSC2/CLKOUT
Q
Q
Q
Q
Q
Q
Q
Q
INPUT MODE
BLOCK DIAGRAM OF GP4
ANALOG
OSC1
F
OSC
INTOSC/
RC/EC
CLKOUT
INPUT MODE
CLKOUT
ENABLE
ENABLE
OSCILLATOR
/4
GPPU
ANALOG
CLKOUT
ENABLE
RD GPIO
CIRCUIT
MODES
Q
Q
1
0
(2)
CLK
EN
EN
(1)
D
D
V
DD
WEAK
V
V
Advance Information
DD
SS
I/O PIN
4.2.4.6
Figure 4-7 shows the diagram for this pin. The GP5 pin
is configurable to function as one of the following:
• a general purpose I/O
• a TMR1 clock input
• a crystal/resonator connection
• a clock input
FIGURE 4-7:
DATA BUS
INTERRUPT-ON-
TRISIO
TRISIO
GPIO
GPIO
WPU
WPU
WR
WR
WR
WR
IOC
IOC
RD
RD
RD
RD
CHANGE
Note
D
D
D
D
TO TMR1 OR CLKGEN
CK
CK
CK
CK
1: Timer1 LP Oscillator enabled.
2: When using Timer1 with LP oscillator, the
GP5/T1CKI/OSC1/CLKIN
Schmitt Trigger is bypassed.
Q
Q
Q
Q
Q
Q
Q
Q
BLOCK DIAGRAM OF GP5
INTOSC
OSC2
MODE
PIC12F683
OSCILLATOR
INTOSC
GPPU
RD GPIO
MODE
CIRCUIT
TMR1LPEN
Q
Q
EN
EN
DS41211A-page 39
D
D
V
(1)
DD
WEAK
V
V
DD
SS
I/O PIN
(1)

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