MCP1726T-ADJZEMF Microchip Technology, MCP1726T-ADJZEMF Datasheet - Page 52

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MCP1726T-ADJZEMF

Manufacturer Part Number
MCP1726T-ADJZEMF
Description
Regulator, Extended Industrial, HVSON, 8-Pin|
Manufacturer
Microchip Technology
Datasheet
PIC12F683
8.1
In Capture mode, CCPR1H:CCPR1L captures the
16-bit value of the TMR1 register when an event occurs
on pin GP2/AN2/T0CKI/INT/COUT. An event is defined
as one of the following and is configured by
CCP1CON<3:0>:
• Every falling edge
• Every rising edge
• Every 4th rising edge
• Every 16th rising edge
When a capture is made, the interrupt request flag bit
CCP1IF (PIR1<5>) is set. The interrupt flag must be
cleared in software. If another capture occurs before
the value in register CCPR1 is read, the old captured
value is overwritten by the new captured value.
8.1.1
In Capture mode, the GP2/AN2/T0CKI/INT/COUT pin
should be configured as an input by setting the
TRISIO<2> bit.
FIGURE 8-1:
8.1.2
Timer1 must be running in Timer mode or Synchro-
nized Counter mode for the CCP module to use the
capture feature. In Asynchronous Counter mode, the
capture operation may not work.
8.1.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep bit
CCP1IE (PIE1<5>) clear to avoid false interrupts and
should clear the flag bit CCP1IF following any such
change in operating mode.
DS41211A-page 50
GP2/CCP1
pin
Note:
Capture Mode
Edge Detect
If the GP2/AN2/T0CKI/INT/COUT pin is
configured as an output, a write to the port
can cause a capture condition.
Q’s
CCP1 PIN CONFIGURATION
Prescaler
TIMER1 MODE SELECTION
SOFTWARE INTERRUPT
1, 4, 16
and
CCP1CON<3:0>
Set Flag bit CCP1IF
CAPTURE MODE
OPERATION BLOCK
DIAGRAM
(PIR1<5>)
Capture
Enable
CCPR1H
TMR1H
CCPR1L
TMR1L
Advance Information
8.1.4
There are four prescaler settings specified by bits
CCP1M3:CCP1M0 (CCP1CON<3:0>). Whenever the
CCP module is turned off, or the CCP module is not in
Capture mode, the prescaler counter is cleared. Any
Reset will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared, therefore, the first capture may be from
a non-zero prescaler. Example 8-1 shows the recom-
mended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
EXAMPLE 8-1:
CLRF
MOVLW
MOVWF
CCP1CON
NEW_CAPT_PS ;Load the W reg with
CCP1CON
CCP PRESCALER
CHANGING BETWEEN
CAPTURE PRESCALERS
 2003 Microchip Technology Inc.
;Turn CCP module off
;the new prescaler
;move value and CCP ON
;Load CCP1CON with this
;value

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