TDA9330 Philips Semiconductors, TDA9330 Datasheet - Page 28

• Manufacturer Part Number: TDA9330
• Description: I2C-bus controlled TV display processors
• Manufacturer: Philips Semiconductors

Philips Semiconductors
Notes
1. The normal operation of the IC is guaranteed for a supply voltage between 7.2 and 8.8 V. When the supply voltage
2. For the low power start-up mode, a voltage of 5 V has to be supplied to pin 22. The current that is required for this
3. The RGB to YUV matrix on the RGB-1 input is the inverse of the YUV to RGB matrix for PAL. For a one-on-one
4. The colorimetry that is used for high definition ATSC signals is described in document ANSI/SMPTE 274M-1995.
2000 May 08
I
V
V
I
I
V
DAC
V
V
Z
I
2
IL
IH
o
o
IL
IH
OL
o(min)
o(max)
C-bus control inputs/outputs; pins 10 and 11
I
SYMBOL
2
drops below the POR level, status bit POR is set and the horizontal output is switched off. When the supply voltage
is between 7.2 V and the POR level, the horizontal frequency is kept in the specified holding range.
function is about 3.0 mA. After the start-up voltage is applied, the signal at the horizontal drive output will have
nominal t
approximately 50 kHz (2fH) or 25 kHz (1fH). The start-up mode is continued as soon as the main supply voltage is
switched on and the I
to 1 within 24 ms, to continue slow start. If bits STB are not sent within 24 ms, the horizontal output will be
automatically switched off via slow stop. It is also possible to first set bits STB to 1, before reading bit POR. Start-up
of the horizontal output will then continue 24 ms after bit POR is read. When the main supply is present, the 5 V
supply on pin 22 can be removed. If low power start-up is not used, pin 22 should be connected to ground. More
information can be found in the application report.
transfer of all three channels from the RGB-1 input to the RGB output, the PAL colour difference matrix should be
selected (MAT = 0, MUS = 0).
The formula to compute the luminance signal from the RGB primary components differs from the formula that is used
for the PAL system. The consequence is that a different matrix is needed to calculate the internal G
the R
The G
R Y
B Y
G Y
Y
C-bus controlled TV display processors
OUTPUT
–
–
–
=
=
=
=
Y and B
Y signal can be derived from the formula for Y:
–
off
–
;
0.2973
PIN
0.2126R
0.2126R
, while t
0.7874R 0.7152G
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
LOW-level output voltage
minimum output voltage
maximum output voltage
output impedance
output current
25; note 47
Y signals, see the formulas below:
R Y
on
–
+
–
–
grows gradually from zero to about 30% of the nominal value, resulting in a line frequency of
2
0.7152G
0.7152G
C-bus data has been received. After status bit POR has been read out, bits STB must be set
PARAMETER
–
0.1010 B Y
+
–
+
0.9278B
0.0722B
0.0722B
–
1.575 maximum amplitude
1.856 maximum amplitude
V
V
SDA; I
note 47
IL
IH
= 0 V
= 5.5 V
28
OL
CONDITIONS
= 6 mA
3.5
0.15
3.7
0.3
MIN.
TDA933xH series
0
0
0.3
4.0
TYP.
Preliminary specification
1.5
5.5
0.6
0.4
4.3
10
2
MAX.
Y signal from
V
V
V
V
k
mA
UNIT
A
A