HT45R06 Holtek Semiconductor, HT45R06 Datasheet - Page 7

• Manufacturer Part Number: HT45R06
• Description: A/D Type 8-Bit OTP MCU
• Manufacturer: Holtek Semiconductor

Program Memory - ROM
The program memory is used to store the program in-
structions which are to be executed. It also contains
data, table, and interrupt entries, and is organized into
1024 14 bits, addressed by the program counter and ta-
ble pointer.
Certain locations in the program memory are reserved
for special usage:
Note: *9~*0: Table location bits
Rev. 1.00
TABRDC [m]
TABRDL [m]
Location 000H
This area is reserved for program initialization. After a
chip reset, the program always begins execution at lo-
cation 000H.
Location 004H
This area is reserved for the external interrupt service
program. If the INT input pin is activated, the interrupt
is enabled and the stack is not full, the program begins
execution at location 004H.
Location 008H
This area is reserved for the timer/event counter inter-
rupt service program. If a timer interrupt results from a
timer/event counter overflow, and if the interrupt is en-
abled and the stack is not full, the program begins ex-
ecution at location 008H.
Location 00CH
This area is reserved for the A/D converter interrupt
service program. If the interrupt is activated (when the
A/D conversion is completed), the interrupt is enabled
and the stack is not full, the program begins execution
at location 00CH.
Table location
Any location in the program memory can be used as
look-up tables. The instructions TABRDC [m] (the
current page, 1 page=256 words) and TABRDL [m]
(the last page) transfer the contents of the lower-order
byte to the specified data memory, and the
higher-order byte to TBLH (08H). Only the destination
of the lower-order byte in the table is well-defined, the
Instruction
@7~@0: Table pointer bits
P9
*9
1
P8
*8
1
@7
@7
*7
@6
@6
*6
Table Location
7
Table Location
@5
@5
*5
P9, P8: Current program counter bits
other bits of the table word are transferred to the lower
portion of TBLH, and the remaining 2 bits are read as
read only. The table pointer (TBLP) is a read/write reg-
ister (07H), which indicates the table location. Before
accessing the table, the location must be placed in
TBLP. The TBLH is read only and cannot be restored.
If the main routine and the ISR (Interrupt Service Rou-
tine) both employ the table read instruction, the con-
tents of the TBLH in the main routine are likely to be
changed by the table read instruction used in the ISR.
Errors can occur. In other words, using the table read
instruction in the main routine and the ISR simulta-
neously should be avoided. However, if the table read
instruction has to be applied in both the main routine
and the ISR, the interrupt is supposed to be disabled
prior to the table read instruction. It will not be enabled
until the TBLH has been backed up. All table related
instructions require two cycles to complete the opera-
tion. These areas may function as normal program
memory depending upon the requirements.
0 . The Table Higher-order byte register (TBLH) is
@4
@4
*4
Program Memory
@3
@3
*3
@2
@2
*2
@1
@1
*1
HT45R06
May 24, 2005
@0
@0
*0