UPD75208 NEC, UPD75208 Datasheet - Page 39

• Manufacturer Part Number: UPD75208
• Description: 4-BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC

* 1. Calculation of total loss
Example
2. Except the system clock oscillator, display controller and timer/pulse generator.
3. The operating voltage range varies depending on the cycle time. Refer to the section describing AC
Design so that the sum of the following three power consumption values for the PD75208CW/GF will be less
than the total loss P
characteristics.
CPU loss
Output pin loss
Pull-down register loss : Power loss due to a pull-down resistor incorporated in the display output pin
Suppose 4-LED output with 9
Further, let the voltage of fluorescent display tube (V
P
In this example, the power consumption of 501.5 mW is less than the allowable total loss for the shrink
of 3 mA, 15 mA and 10 mA flow to the segment pin, timing pin and LED output pin, respectively.
DIP package (600 mW). However, since the allowable total loss is 450 mW for the QFP package, it is
necessary to decrease power consumption by decreasing the number of on-chip pull-down resistors. In
this example, power consumption can be adjusted to 344 mW by incorporating pull-down resistors in
only 11 digit outputs and 4 segment outputs and externally mounting pull-down resistors to the 5
remaining segment outputs.
T
=
CPU loss : 5.5 V
Pin loss : Segment pin ..... 2 V
Pull-down resistor loss ........
+
+
= 501.5 mW
T
Timing pin ......... 2 V
LED output ........
(It is recommended to use the system with 80 % or less of the rating).
9.0 mA = 49.5 mW
: Given as V
: There are normal output pin loss and display output pin loss. It is necessary
to add a loss derived from the flow of maximum current to each output pin.
by mask option.
SEG
(30 + 5.5 V)
11
10
15
DD
DIGIT
40 k
3 mA
15 mA = 30 mW
(MAX.)
, V
2 V
DD
2
= 5 V + 10 % and 4.19 MHz oscillation and let a maximum
9 = 54 mW
10 = 315 mW
10 mA
I
DD1
LOAD
(MAX.)
voltage) be –30 V and normal voltage be small.
4 = 53 mW
PD75208
39