UPD78323 NEC, UPD78323 Datasheet - Page 48

• Manufacturer Part Number: UPD78323
• Description: 16/8-BIT SINGLE-CHIP MICROCONTROLLER
• Manufacturer: NEC

48
7. OPERATION AFTER RESET
(reset status). If RESET input becomes high level, program execution is started. Initialize the contents of various registers
in the program as required.
Cautions 1. While RESET is active(low level), all pins remain high impedance (except WDTO, AV
acknowledge as shown in Figure 7-2.
If the RESET input pin is set to the low level, the system reset is applied and each hardware becomes as initialized status
Change the number of cycles for the programmable wait register and the fetch cycle control register in particular.
The RESET input pin is equipped with an analog delay noise suppressor to prevent malfunctioning due to noise.
For reset operation upon power-up, secure the oscillation stabilizing time of about 40 msec from power-up to reset
RESET Input
RESET
2. If RAM has been expanded externally, mount a pull-up resistor to the P90/RD and P91/WR pins. It is
V
DD
V
possible that the P90/RD and P91/WR pins become high impedance resulting in an external RAM
contents corruption or input unit damage. In addition, signals may collide on the address/data bus,
resulting in the destruction of the input/output circuit.
DD
, V
SS
, X1 and X2).
Analog
Delay
Removed
as Noise
Figure 7-1. Reset Signal Acknowledge
Figure 7-2. Reset Upon Power-Up
Analog
Delay
Reset
Acknowl-
edged
Oscillation
Stabilizing
Time
Analog
Delay
Reset
Release
Analog
Delay
Reset
Release
PD78323, 78324
REF
, AV
DD
, AV
SS
,