AN1362 STMicroelectronics, AN1362 Datasheet - Page 12

• Manufacturer Part Number: AN1362
• Description: SWITCHED RELUCTANCE MOTOR CONTROL BY ST FIVE
• Manufacturer: STMicroelectronics

AN1362
APPENDIX B: ASM FIRMWARE
;*********************************************************************************************************************
; Author: N. Abbate 15/06/2001
;This Project shows how to drive a Three Phase Switched Reluctance Motor.
;It uses a PWM signal on pin PC2/T1OUT with a frequency of 20kHz and a variable duty cycle.
;On pin PB0/Ain0, the internal peripheral A/D Converter reads the Bus current.
;The Timer0 peripheral measures the encoder signal in order to compute the speed of the motor. The frequency of the timer is 610 Hz.
;Timer1 has two functions: the former supplies a predetermined timing for the Soft Start Phase. The latter turns off the control signal at high
speed. (pre-phase)
;The Analyze_encoder procedure filters the encoder signals to be put into Main Program.
;The Low_speed procedure sends the control signals to the driver in order to energize the phases at low speed.
;The High_speed procedure sends the control signal at high speed.
;The AD Converter Interrupt Routine performs the Current Mode Modulation: an Hysteresis control of the Bus current.
;The Timer 0 Interrupt Routine measures the encoder in order to obtain the speed and choices the right “pointer” for the pre-phase L.U.T.
;(Table).
;The Timer 1 Interrupt Routine is dedicated to the Soft Start and to "turn off" the driving signals during the pre-phase action.
;*********************************************************************************************************************
; Prb 4
; Prb 10
; Interrupt Vector Configuration
; Tables Allocation
;
;
;
;
;
; Store Device Configuration Parameters into Eprom
;
;
;
;
;
;
ClockMode
;
;
;
;
12/26
irq
irq
irq
irq
irq
data 0 18 25 ; Pre_phase[0] = 25
data 0 19 50 ; Pre_phase[1] = 50
data 0 20 80 ; Pre_phase[2] = 80
data 0 21 120; Pre_phase[3] = 120
data 0 22 135; Pre_phase[4] = 135
data 0 23 152; Pre_phase[5] = 152
data 0 24 160; Pre_phase[6] = 160
data 0 25 180; Pre_phase[7] = 180
data 0 26 200; Pre_phase[8] = 200
data 0 27 220; Pre_phase[9] = 220
setmem 0 28
data 0 28 228; RegConf_01 = 11100100
data 0 31 144; RegConf_04 = 10010000
data 0 39 248; RegConf_12 = 11111000
data 0 40 255; RegConf_13 = 11111111
data 0 41 3 ; RegConf_14 = 00000011
data 0 42 243; RegConf_15 = 11110011
data 0 43 1 ; RegConf_16 = 00000001
data 0 30 58 ; RegConf_03 = 00111010
data 0 29 0 ; RegConf_02 = 00000000
data 0 32 88 ; RegConf_05 = 01011000
data 0 33 47 ; RegConf_06 = 00101111
data 0 34 4 ; RegConf_07 = 00000100
data 0 35 192; RegConf_08 = 11000000
"BYTE Pre_phase[10]" use 10 eprom locations from 18(Page:0 Offset:18) to 27(Page:0 Offset:27)
Tables Allocation Report:
Default Interrupt Priority (Hi-->Lo): A/D, Timer0, Timer1, Timer2
Pin Configuration
A/D Converter Configuration
ConvertionMode : Continuous
ChannelMode
Channel
WatchDog Configuration
Pwm-Timer 0 Configuration
Pwm-Timer 1 Configuration
byte used : 10
0 AD_Converter
1 PwmTimer0
2 PwmTimer1
3 PwmTimer2
4 External
from : 18(Page:0 Offset:18)
to : 27(Page:0 Offset:27)
: Divided
: 1
: Multiple
; 00011001b, 0x19
; 00110010b, 0x32
; 01010000b, 0x50
; 01111000b, 0x78
; 10000111b, 0x87
; 10011000b, 0x98
; 10100000b, 0xA0
; 10110100b, 0xB4
; 11001000b, 0xC8
; 11011100b, 0xDC