DS1007

Manufacturer Part NumberDS1007
Description7-1 Silicon Delay Line
ManufacturerDallas Semiconducotr
DS1007 datasheet
 


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FEATURES
All-silicon time delay
7 independent buffered delays
Delay tolerance ±2 ns
Four delays can be custom set between 3 ns
and 10 ns
Three delays can be custom set between 9 ns
and 40 ns
Delays are stable and precise
Economical
Auto-insertable, low profile
Surface mount 16-pin SOIC
Low-power CMOS
TTL/CMOS-compatible
Vapor phase, IR and wave solderable
Custom specifications available
Quick turn prototypes
DESCRIPTION
The DS1007 7-in-1 Silicon Delay Line provides seven independent delay times which are set by Dallas
Semiconductor to the customer’s specification. The delay times can be set from 3 ns to 40 ns with an
accuracy of 2 ns at room temperature. The device is offered in both a 16-pin DIP and a 16-pin SOIC.
Since the DS1007 is an all-silicon solution, better economy and reliability are achieved when compared to
older methods using hybrid technology. The DS1007 reproduces the input logic state at the output after
the fixed delay. Dallas Semiconductor can customize standard products to meet special needs. For special
requests and rapid delivery, call (972) 371–4348.
7-1 Silicon Delay Line
PIN ASSIGNMENT
IN1
1
16
IN3
OUT1
2
15
OUT3
IN2
3
14
IN4
OUT2
4
13
OUT4
OUT1
V
5
12
GND
CC
OUT2
OUT7
IN5
6
11
OUT5
7
10
IN7
OUT5
9
IN6
8
OUT6
DS1007 16-Pin DIP (300-mil)
See Mech. Drawings Section
See Mech. Drawings Section
PIN DESCRIPTION
IN1 - IN7
- Inputs
Out1 – Out7 - Outputs
GND
- Ground
V
- +5 Volts
CC
1 of 6
DS1007
IN1
1
IN3
16
15
OUT3
2
14
IN2
3
IN4
OUT4
4
13
V
5
GND
12
CC
IN5
6
11
OUT7
7
10
IN7
IN6
8
9
OUT6
DS1007S 16-Pin SOIC
(300-mil)
111799

DS1007 Summary of contents

  • Page 1

    ... Quick turn prototypes DESCRIPTION The DS1007 7-in-1 Silicon Delay Line provides seven independent delay times which are set by Dallas Semiconductor to the customer’s specification. The delay times can be set from with an accuracy room temperature. The device is offered in both a 16-pin DIP and a 16-pin SOIC. ...

  • Page 2

    ... DS1007-6 6 DS1007-7 7 DS1007-8 8 DS1007-9 9 DS1007-10 10 DS1007-11 3 DS1007-12 3 DS1007-13 3 DS1007-14 7 Custom delays available. Out 1 through Out 4 can be custom set from (leading edge only accuracy). Out 5 through Out 7 can be set from (both leading and trailing edge accuracy). ) Table 1 PLH ...

  • Page 3

    ... TIMING DIAGRAM: SILICON DELAY LINE Figure 2 TEST CIRCUIT Figure DS1007 ...

  • Page 4

    ... V = 5.0V ± 5%) CC TYP MAX UNITS 5. 0.8 V 1.0 uA 40.0 70 25° ± 5 TYP MAX UNITS ns Table 1 ns 100 TYP MAX UNITS DS1007 NOTES NOTES 25°C) NOTES ...

  • Page 5

    ... TEST SETUP DESCRIPTION Figure 3 illustrates the hardware configuration used for measuring the timing parameters on the DS1007. The input waveform is produced by a precision pulse generator under software control. Time delays are measured by a time interval counter (20 ps resolution) connected between the input and each output ...

  • Page 6

    ... Period: 1 µs OUTPUT: Each output is loaded with the equivalent of one 74F04 input gate. Delay is measured at the 1.5V level on the rising edge. NOTE: Above conditions are for test only and do not restrict the operation of the device under other data sheet conditions DS1007 ...