DS1013

Manufacturer Part NumberDS1013
Description3-in-1 Silicon Delay Line
ManufacturerDallas Semiconducotr
DS1013 datasheet
 


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FEATURES
All-silicon time delay
3 independent buffered delays
Delay tolerance ±2ns for -10 through –60
Stable and precise over temperature and
voltage range
Leading and trailing edge accuracy
Economical
Auto-insertable, low profile
Standard 14-pin DIP, 8-pin DIP, or 16-pin
SOIC
Low-power CMOS
TTL/CMOS-compatible
Vapor phase, IR and wave solderable
Custom delays available
Quick turn prototypes
Extended temperature ranges available
DESCRIPTION
The DS1013 series of delay lines has three independent logic buffered delays in a single package. The
devices are offered in a standard 14-pin DIP which is pin-compatible with hybrid delay lines. Alternative
8-pin DIP and surface mount packages are available which save PC board area. Since the DS1013
products are an all silicon solution, better economy is achieved when compared to older methods using
hybrid techniques. The DS1013 series delay lines provide a nominal accuracy of 2ns for delay times
ranging from 10 ns to 60 ns, increasing to 5% for delays of 150 ns and longer. The DS1013 delay line
reproduces the input logic state at the output after a fixed delay as specified by the dash number extension
of the part number. The DS1013 is designed to reproduce both leading and trailing edges with equal
precision. Each output is capable of driving up to 10 74LS loads. Dallas Semiconductor can customize
standard products to meet special needs. For special requests and rapid delivery, call (972) 371–4348.
3-in-1 Silicon Delay Line
PIN ASSIGNMENT
IN 1
1
14
V
CC
13
NC
2
NC
12
IN 2
3
OUT 1
11
NC
4
NC
IN 3
10
OUT 2
5
9
NC
6
NC
8
7
GND
OUT 3
GND
DS1013 14-pin DIP (300-mil)
See Mech. Drawings Section
See Mech. Drawings Section
1
IN 1
2
IN 2
3
IN 3
4
GND
DS1013M 8-pin DIP (300-mil)
See Mech. Drawings Section
PIN DESCRIPTION
IN 1, IN 2, IN 3
OUT 1, OUT 2, OUT 3 - Outputs
GND
V
CC
NC
1 of 6
DS1013
IN 1
1
16
V
CC
NC
15
2
NC
NC
3
NC
14
IN 2
4
13
OUT 1
5
NC
NC
12
IN 3
6
11
OUT 2
NC
7
10
NC
8
OUT 3
9
DS1013S 16-pin SOIC
(300-mil)
V
8
CC
7
OUT 1
6
OUT 2
5
OUT 3
- Inputs
- Ground
- +5 Volts
- No Connection
111799

DS1013 Summary of contents

  • Page 1

    ... The DS1013 series delay lines provide a nominal accuracy of 2ns for delay times ranging from ns, increasing to 5% for delays of 150 ns and longer. The DS1013 delay line reproduces the input logic state at the output after a fixed delay as specified by the dash number extension of the part number ...

  • Page 2

    ... LOGIC DIAGRAM Figure 1 PART NUMBER DELAY TABLE (t PART NO. DS1013-10 DS1013-12 DS1013-15 DS1013-20 DS1013-25 DS1013-30 DS1013-35 DS1013-40 DS1013-45 DS1013-50 DS1013-60 DS1013-70* DS1013-75* DS1013-80* DS1013-100* DS1013-150** DS1013-200** Custom delays available * ±3% tolerance ** ±5% tolerance , t ) Table 1 PHL PLH DELAY PER OUTPUT (ns) 10/10/10 12/12/12 15/15/15 20/20/20 25/25/25 30/30/30 35/35/35 40/40/40 45/45/45 50/50/50 60/60/60 70/70/70 75/75/75 80/80/80 100/100/100 150/150/150 200/200/200 ...

  • Page 3

    ... TIMING DIAGRAM: SILICON DELAY LINE Figure 2 TEST CIRCUIT Figure DS1013 ...

  • Page 4

    ... V = 5.0V ± 5%) CC TYP MAX UNITS 5.00 5. 0.5 CC 0.8 V 1.0 µ -1 25° ± 5 TYP MAX UNITS ns Table 1 ns Table 1 ns 100 TYP MAX UNITS DS1013 NOTES NOTES 25°C) NOTES ...

  • Page 5

    ... Delay, Rising): The elapsed time between the 1.5V point on the leading edge of the input PLH pulse and the 1.5V point on the leading edge of any tap output pulse. t (Time Delay, Falling): The elapsed time between the 1.5V point on the trailing edge of the input PHL pulse and the 1.5V point on the trailing edge of any tap output pulse DS1013 ...

  • Page 6

    ... TEST SETUP DESCRIPTION Figure 3 illustrates the hardware configuration used for measuring the timing parameters on the DS1013. The input waveform is produced by a precision pulse generator under software control. Time delays are measured by a time interval counter (20 ps resolution) connected between each input and corresponding output ...