DS1610 Dallas Semiconducotr, DS1610 Datasheet - Page 3

• Manufacturer Part Number: DS1610
• Description: Partitioned NV Controller
• Manufacturer: Dallas Semiconducotr

21
location sets that partition to write protect. A logical 0 in a bit location disables write protection. For
example, if during the pattern match sequence bit 22 on address pin A
partition register location for partition 5 to be set to a 1. This in turn would cause the DS1610 to inhibit
register, data which is being accessed from the RAM should be ignored as the purpose of the 24 read
cycles is to set the partition switch and not for the purpose of accessing data from RAM. Also note that on
initial battery attach the partition register can power-up in any state.
PATTERN MATCH TO WRITE PARTITION REGISTER Table 1
PARTITION REGISTER MAPPING Table 2
WEO
A
A
A
A
st
W
X
Y
Z
Address
through 24
Pin
from going low as
A
A
A
A
1
1
1
1
1
A
A
A
A
A
A
A
A
A
A
A
A
W
W
W
W
X
Y
Z
X
Y
Z
X
Y
Z
X
Y
Z
2
0
1
1
1
3
1
1
1
0
th
4
1
1
1
0
read cycle as defined by A
Bit number in pattern
5
1
1
0
0
Match sequence
6
1
0
0
1
WEI
BIT 21
BIT 21
BIT 21
BIT 21
BIT 22
BIT 22
BIT 22
BIT 22
BIT 23
BIT 23
BIT 23
BIT 23
BIT 24
BIT 24
BIT 24
BIT 24
7
0
0
1
1
goes low whenever A
8
0
1
1
1
9
1
1
1
0
10
1
1
0
0
11
1
0
0
1
W
through A
12
0
0
1
0
3 of 10
Partition Number
PARTITION 10
PARTITION 11
PARTITION 12
PARTITION 13
PARTITION 14
PARTITION 15
Z
PARTITION 0
PARTITION 1
PARTITION 2
PARTITION 3
PARTITION 4
PARTITION 5
PARTITION 6
PARTITION 7
PARTITION 8
PARTITION 9
A
13
0
1
0
0
Y
A
14
0
0
1
0
X
Z
A
and shown in Table 2. A logical 1 in a bit
W
15
0
1
0
1
=0101. Note that while setting the partition
16
0
1
1
0
17
1
0
0
1
X
were a 1, this would cause the
18
1
0
0
0
Address State Affected
19
0
0
0
0
(A
20
1
0
1
0
Z
A
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Y
21
X
X
X
X
A
X
22
X
X
X
X
A
W
)
23
X
X
X
X
DS1610
24
X
X
X
X