DS2506S Dallas Semiconducotr, DS2506S Datasheet - Page 14

• Manufacturer Part Number: DS2506S
• Description: 64-kbit Add-Only Memory
• Manufacturer: Dallas Semiconducotr

Hardware Configuration
The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to
drive it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have an
open drain connection or 3-state outputs. The DS2506 is an open drain part with an internal circuit
equivalent to that shown in Figure 6. The bus master can be the same equivalent circuit. If a bi-directional
pin is not available, separate output and input pins can be tied together.
The bus master requires a pullup resistor at the master end of the bus, with the bus master circuit
equivalent to the one shown in Figures 7a and 7b. The value of the pullup resistor should be
approximately 5 kΩ for short line lengths.
A multidrop bus consists of a 1-Wire bus with multiple slaves attached. At regular speed the 1-Wire bus
has a maximum data rate of 16.3 kbits per second. The speed can be boosted to 142 kbits per second by
activating the Overdrive mode. If the bus master is also required to perform programming of the EPROM
portions of the DS2506, a programming supply capable of delivering up to 10 milliamps at 12 volts for
480 µs is required. The idle state for the 1-Wire bus is high. If, for any reason, a transaction needs to be
suspended, the bus MUST be left in the idle state if the transaction is to resume. If this does not occur and
the bus is left low for more than 16 µs (overdrive speed) or more than 120 µs (regular speed), one or more
of the devices on the bus may be reset.
Transaction Sequence
The sequence for accessing the DS2506 via the 1-Wire port is as follows:
INITIALIZATION
All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence
consists of a reset pulse transmitted by the bus master followed by a presence pulse(s) transmitted by the
slave(s).
The presence pulse lets the bus master know that the DS2506 is on the bus and is ready to operate. For
more details, see the “1-Wire Signalling” section.
ROM FUNCTION COMMANDS
Once the bus master has detected a presence, it can issue one of the six ROM function commands. All
ROM function commands are 8 bits long. A list of these commands follows (refer to flowchart in Figure
8):
Initialization
ROM Function Command
Memory Function Command
Read/Write Memory/Status
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