AN1646 Freescale Semiconductor / Motorola, AN1646 Datasheet - Page 5

• Manufacturer Part Number: AN1646
• Description: AN1646 Noise Considerations for Integrated Pressure Sensors
• Manufacturer: Freescale Semiconductor / Motorola

age, any variation in supply voltage will also proportionally ap-
pear at the output of the sensor. The integrated pressure
sensor is designed, characterized and trimmed to be powered
with a 5 V +/– 5% power supply which can supply the maxi-
mum 10 mA current requirement of the sensor. Powering the
integrated sensor at another voltage than specified is not rec-
ommended because the offset, temperature coefficient of off-
set (TCO) and temperature coefficient of span (TCS) trim will
be invalidated and will affect the sensor accuracy.
tant. A 0.33 F to 1.0 F ceramic capacitor in parallel with a
0.01 F ceramic capacitor works well for this purpose. Also,
with respect to noise, it is preferable to use a linear regulator
such as an MC78L05 rather than a relatively more noisy
switching power supply 5 volt output. An additional consider-
ation is that the power to the sensor and the A/D voltage refer-
ence should be tied to the same supply. Doing this takes
advantage of the sensor output ratiometricity. Since the A/D
resolution is also ratiometric to its reference voltage, varia-
tions in supply voltage will be canceled by the system.
of the total design. Often, getting a system to work properly de-
pends as much on layout as on the circuit design. The follow-
ing discussion covers some general layout principles, digital
section layout and analog section layout.
General Principles:
tant in mixed systems. They can be described as five rules:
that applies to both analog and digital circuits. Loops are
antennas. At noise sensitive inputs, the area enclosed by an
incoming signal path and its return is proportional to the
amount of noise picked up by the input. At digital output ports,
the amount of noise that is radiated is also proportional to
loop area.
flow in opposite directions as close as possible to each
other. If two equal currents flow in opposite directions, the re-
sulting electromagnetic fields will cancel as the two currents
are brought infinitely close together. In printed circuit board
layout, this situation can be approximated by running signals
and their returns along the same path but on different layers.
Field cancellation is not perfect due to the finite physical sepa-
ration, but is sufficient to warrant serious attention in critical
paths. Looked at from a different perspective, this is another
way of looking at Rule # 1, i.e., minimize loop areas.
Motorola Sensor Device Data
Since the sensor output is ratiometric with the supply volt-
From a noise point of view, adequate de–coupling is impor-
In mixed analog and digital systems, layout is a critical part
There are several general layout principles that are impor-
Rule 1: Minimize Loop Areas. This is a general principle
Rule 2: Cancel fields by running equal currents that
LAYOUT OPTIMIZATION
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Figure 8. Minimizing Loop Areas
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degree angles, including “T” connections. If you think of
high speed signals in terms of wavefronts moving down a
trace, the reason for avoiding 90 degree angles is simple. To
a high speed wavefront, a 90 degree angle is a discontinuity
that produces unwanted reflections. From a practical point of
view, 90 degree turns on a single trace are easy to avoid by
using two 45 degree angles or a curve. Where two traces
come together to form a “T” connection, adding some material
to cut across the right angles accomplishes the same thing.
grounds at only one point. The reason for this constraint is
that transient voltage drops along the power grounds can be
substantial, due to high values of di/dt flowing through finite in-
ductance. If signal processing circuit returns are connected to
power ground at multiple points, then these transients will
show up as return voltage differences at different points in the
signal processing circuitry. Since signal processing circuitry
seldom has the noise immunity to handle power ground tran-
sients, it is generally necessary to tie signal ground to power
ground at only one point.
planes are highly beneficial when used with digital circuitry, in
the analog world they are better used selectively. A single
ground plane on an analog board puts parasitic capacitance
in places where it is not desired, such as at the inverting inputs
of op amps. Ground planes also limit efforts to take advantage
of field cancellation, since the return is distributed.
cancellation are useful design techniques. Field cancellation
is applicable to power and ground traces, where currents are
equal and opposite. Running these two traces directly over
each other provides field cancellation for unwanted noise, and
minimum loop area.
de–coupling loop that has been routed correctly and one that
has not. In this figure, the circles represent pads, the schemat-
ic symbols show the components that are connected to the
pads, and the routing layers are shown as dark lines (top
trace) or grey lines (bottom trace). Note that by routing the two
traces one over the other that the critical loop area is mini-
mized. In addition, it is important to keep de–coupling capaci-
tors close to active devices such as MPX5000–series sensors
and operational amplifiers. As a rule of thumb, when 50 mil
ground and Vcc traces are used, it is not advisable to have
more than 1 inch between a de–coupling capacitor and the ac-
tive device that it is intended to be de–coupled.
Rule 3: On traces that carry high speed signals avoid 90
Rule 4: Connect signal circuit grounds to power
Rule 5: Use ground planes selectively. Although ground
Figure 8 illustrates the difference between a power supply
In analog systems, both minimizing loop areas and field
ANALOG LAYOUT
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