AN2148 Motorola / Freescale Semiconductor, AN2148 Datasheet - Page 17

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AN2148

Manufacturer Part Number
AN2148
Description
Design Considerations for Interfacing SDRAM with MC68VZ328
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
4
The following are the initialization sequences use by the VZ ADS board:
delay
;***************************************
; SDRAM 64M-bit, Single Band, Latency 2
;***************************************
move.w
move.w
move.w
move.w
move.w
move.w
move.w
clr.w
addi.w
cmp.w
bne
move.w
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
move.w
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
move.w
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
SDRAM Initialization Sequences
#$0000,GRPBASED
#$0281,CSD
#$0040,CSCR
#$0000,DRAMC
#$C03F,SDCTRL
#$4020,DRAMMC
#$8000,DRAMC
d0
#1,d0
#$FFFF,d0
delay
#$C83F,SDCTRL
#$D03F,SDCTRL
#$D43F,SDCTRL
SDRAM Initialization Sequences
; Chip Sel Control Reg
; Disable DRAM Controller
; Issue precharge comm
; Enable refresh
; Issue mode command
; Set SDRAM base address to 0x0
Pre-Publication Draft
; Set CPM, CL1, Single Bank
; Multiplexing for 64Mb SDRAM
; Enable DRAM Controller
; Delay period for SDRAM
DRAM Controller Registers
17

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