IDT72261LA15PF IDT, Integrated Device Technology Inc, IDT72261LA15PF Datasheet - Page 4

• Manufacturer Part Number: IDT72261LA15PF
• Description: IC FIFO 8192X18 LP 15NS 64QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 7200r

Specifications of IDT72261LA15PF

• Function: Synchronous
• Memory Size: 144K (8K x 18)
• Data Rate: 67MHz
• Access Time: 15ns
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72261LA15PF

PIN DESCRIPTION
IDT72261LA/72271LA SuperSync FIFO™
16,384 x 9 and 32,768 x 9
Symbol
D
MRS
PRS
RT
FWFT/SI
WCLK
WEN
RCLK
REN
OE
SEN
LD
DC
FF/IR
EF/OR
PAF
PAE
Q
V
GND
HF
CC
0
0
–D
–Q
8
8
Data Inputs
Master Reset
Partial Reset
Retransmit
First Word Fall
Write Clock
Write Enable
Read Clock
Read Enable
Output Enable
Serial Enable
Load
Don't Care
Full Flag/
Input Ready
Empty Flag/
Output Ready
Programmable
Almost-Full Flag
Programmable
Almost-Empty Flag
Half-Full Flag
Data Outputs
Power
Ground
Name
I/O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
Data inputs for a 9-bit bus.
MRS initializes the read and write pointers to zero and sets the output register to all zeroes.
During Master Reset, the FIFO is configured for either FWFT or IDT Standard mode, one of
two programmable flag default settings, and serial or parallel programming of the offset settings.
PRS initializes the read and write pointers to zero and sets the output method (serial or parallel),
and programmable flag settings are all retained.
RT asserted on the rising edge of RCLK initializes the READ pointer to zero, sets the EF flag to
LOW (OR to HIGH in FWFT mode) temporarily and does not disturb the write pointer, programming
During Master Reset, selects First Word Fall Through or IDT Standard mode. Through/Serial
In After Master Reset, this pin functions as a serial input for loading offset registers
the programmable registers for parallel programming, and when enabled by SEN, the rising
edge of WCLK writes one bit of data into the programmable register for serial programming.
WEN enables WCLK for writing data into the FIFO memory and offset registers.
from the programmable registers.
REN enables RCLK for reading data from the FIFO memory and offset registers.
OE controls the output impedance of Q
SEN enables serial loading of programmable flag offsets.
the flag offset programming method, serial or parallel. After Master Reset, this pin enables writing to
and reading from the offset registers.
available for writing to the FIFO memory.
available at the outputs.
PAF goes LOW if the number of words in the FIFO memory is more than word capacity of the FIFO
minus the full offset value m, which is stored in the Full Offset register. There are two possible default
values for m: 127 or 1,023.
PAE goes LOW if the number of words in the FIFO memory is less than offset n, which is stored in the
Empty Offset register. There are two possible default values for n: 127 or 1,023. Other values for n
can be programmed into the device.
HF indicates whether the FIFO memory is more or less than half-full.
Data outputs for a 9-bus
+5 Volt power supply pins.
Ground pins.
When enabled by WEN, the rising edge of WCLK writes data into the FIFO and offsets into
When enabled by REN, the rising edge of RCLK reads data from the FIFO memory and offsets
During Master Reset, LD selects one of two partial flag default offsets (127 or 1,023) and determines
This pin must be tied to either V
In the IDT Standard mode, the FF function is selected. FF indicates whether or not the FIFO memory
is full. In the FWFT mode, the IR function is selected. IR indicates whether or not there is space
In the IDT Standard mode, the EF function is selected. EF indicates whether or not the FIFO memory
is empty. In FWFT mode, the OR function is selected. OR indicates whether or not there is valid data
method, existing timing mode or programmable flag settings. RT is useful to reread data from the
first physical location of the FIFO.
4
CC
or GND and must not toggle after Master Reset.
Description
n.
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
JANUARY 7, 2009