LM3S6110 Luminary Micro, Inc, LM3S6110 Datasheet - Page 13

• Manufacturer Part Number: LM3S6110
• Description: Lm3s6110 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Register 15:
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General-Purpose Input/Outputs (GPIOs) ................................................................................... 138
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General-Purpose Timers ............................................................................................................. 179
Register 1:
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July 25, 2008
Flash Memory Protection Read Enable 3 (FMPRE3), offset 0x20C ................................... 134
Flash Memory Protection Program Enable 1 (FMPPE1), offset 0x404 ............................... 135
Flash Memory Protection Program Enable 2 (FMPPE2), offset 0x408 ............................... 136
Flash Memory Protection Program Enable 3 (FMPPE3), offset 0x40C ............................... 137
GPIO Data (GPIODATA), offset 0x000 ............................................................................ 145
GPIO Direction (GPIODIR), offset 0x400 ......................................................................... 146
GPIO Interrupt Sense (GPIOIS), offset 0x404 .................................................................. 147
GPIO Interrupt Both Edges (GPIOIBE), offset 0x408 ........................................................ 148
GPIO Interrupt Event (GPIOIEV), offset 0x40C ................................................................ 149
GPIO Interrupt Mask (GPIOIM), offset 0x410 ................................................................... 150
GPIO Raw Interrupt Status (GPIORIS), offset 0x414 ........................................................ 151
GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ................................................... 152
GPIO Interrupt Clear (GPIOICR), offset 0x41C ................................................................ 153
GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ............................................ 154
GPIO 2-mA Drive Select (GPIODR2R), offset 0x500 ........................................................ 156
GPIO 4-mA Drive Select (GPIODR4R), offset 0x504 ........................................................ 157
GPIO 8-mA Drive Select (GPIODR8R), offset 0x508 ........................................................ 158
GPIO Open Drain Select (GPIOODR), offset 0x50C ......................................................... 159
GPIO Pull-Up Select (GPIOPUR), offset 0x510 ................................................................ 160
GPIO Pull-Down Select (GPIOPDR), offset 0x514 ........................................................... 161
GPIO Slew Rate Control Select (GPIOSLR), offset 0x518 ................................................ 162
GPIO Digital Enable (GPIODEN), offset 0x51C ................................................................ 163
GPIO Lock (GPIOLOCK), offset 0x520 ............................................................................ 164
GPIO Commit (GPIOCR), offset 0x524 ............................................................................ 165
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ....................................... 167
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ....................................... 168
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ....................................... 169
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC ...................................... 170
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ....................................... 171
GPIO Peripheral Identification 1 (GPIOPeriphID1), offset 0xFE4 ....................................... 172
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ....................................... 173
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC ...................................... 174
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .......................................... 175
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .......................................... 176
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .......................................... 177
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 178
GPTM Configuration (GPTMCFG), offset 0x000 .............................................................. 191
GPTM TimerA Mode (GPTMTAMR), offset 0x004 ............................................................ 192
GPTM TimerB Mode (GPTMTBMR), offset 0x008 ............................................................ 194
GPTM Control (GPTMCTL), offset 0x00C ........................................................................ 196
GPTM Interrupt Mask (GPTMIMR), offset 0x018 .............................................................. 199
GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C ..................................................... 201
GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ................................................ 202
GPTM Interrupt Clear (GPTMICR), offset 0x024 .............................................................. 203
GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ................................................. 205
GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C ................................................ 206
Preliminary
LM3S6110 Microcontroller
13