LM3S8933 Luminary Micro, Inc, LM3S8933 Datasheet - Page 481

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LM3S8933

Manufacturer Part Number
LM3S8933
Description
Lm3s8933 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Reset
Reset
Type
Type
Ethernet MAC Number of Packets (MACNP)
Base 0x4004.8000
Offset 0x034
Type RO, reset 0x0000.0000
July 25, 2008
Bit/Field
31:6
5:0
RO
RO
31
15
0
0
Register 14: Ethernet MAC Number of Packets (MACNP), offset 0x034
This register holds the number of frames that are currently in the RX FIFO. When NPR is 0, there
are no frames in the RX FIFO and the RXINT bit is not set. When NPR is any other value, there is
at least one frame in the RX FIFO and the RXINT bit in the MACRIS register is set.
RO
RO
30
14
0
0
reserved
RO
RO
29
13
0
0
Name
NPR
RO
RO
28
12
0
0
RO
RO
27
11
0
0
reserved
Type
RO
RO
RO
RO
26
10
0
0
Reset
0x0
0x0
RO
RO
25
0
9
0
Preliminary
RO
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Number of Packets in Receive FIFO
The NPR bits represent the number of packets stored in the RX FIFO.
While the NPR field is greater than 0, the RXINT interrupt in the MACRIS
register is asserted.
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
LM3S8933 Microcontroller
RO
RO
19
0
3
0
NPR
RO
RO
18
0
2
0
RO
RO
17
0
1
0
RO
RO
16
0
0
0
481

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