LM3S300 Luminary Micro, Inc, LM3S300 Datasheet - Page 107
LM3S300
Manufacturer Part Number
LM3S300
Description
Lm3s300 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S300.pdf
(380 pages)
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7.3
7.3.1
June 04, 2008
Flash Memory Initialization and Configuration
This section shows examples for using the flash controller to perform various operations on the
contents of the flash memory.
Changing Flash Protection Bits
As discussed in “Flash Memory Protection” on page 105, changes to the protection bits must be
committed before they take effect. The sequence below is used change and commit a block protection
bit in the FMPRE or FMPPE registers. The sequence to change and commit a bit in software is as
follows:
1.
2.
3.
There is a special sequence to change and commit the DBG bits in the Flash Memory Protection
Read Enable (FMPRE) register. This sequence also sets and commits any changes from 1 to 0 in
the block protection bits (for execute-only) in the FMPRE register.
1.
2.
3.
Below is an example code sequence to permanently disable the JTAG and SWD interface to the
debug module using Luminary Micro's DriverLib peripheral driver library:
#include "hw_types.h"
#include "hw_flash.h"
void
permanently_disable_jtag_swd(void)
{
The Flash Memory Protection Read Enable (FMPRE) and Flash Memory Protection Program
Enable (FMPPE) registers are written, changing the intended bit(s). The action of these changes
can be tested by software while in this state.
The Flash Memory Address (FMA) register (see page 110) bit 0 is set to 1 if the FMPPE register
is to be committed; otherwise, a 0 commits the FMPRE register.
The Flash Memory Control (FMC) register (see page 112) is written with the COMT bit set. This
initiates a write sequence and commits the changes.
The Flash Memory Protection Read Enable (FMPRE) register is written, changing the intended
bit(s). The action of these changes can be tested by software while in this state.
The Flash Memory Address (FMA) register (see page 110) is written with a value of 0x900.
The Flash Memory Control (FMC) register (see page 112) is written with the COMT bit set. This
initiates a write sequence and commits the changes.
//
// Clear the DBG field of the FMPRE register. Note that the value
// used in this instance does not affect the state of the BlockN
// bits, but were the value different, all bits in the FMPRE are
// affected by this function!
//
HWREG(FLASH_FMPRE) &= 0x3fffffff;
//
// The following sequence activates the one-time
// programming of the FMPRE register.
//
HWREG(FLASH_FMA) = 0x900;
Preliminary
LM3S300 Microcontroller
107
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