LM3S300 Luminary Micro, Inc, LM3S300 Datasheet - Page 167

• Manufacturer Part Number: LM3S300
• Description: Lm3s300 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

9.3.4
9.3.5
June 04, 2008
In One-Shot mode, the timer stops counting after step 8 on page 166. To re-enable the timer, repeat
the sequence. A timer configured in Periodic mode does not stop counting after it times out.
16-Bit Input Edge Count Mode
A timer is configured to Input Edge Count mode by the following sequence:
1.
2.
3.
4.
5.
6.
7.
8.
9.
In Input Edge Count Mode, the timer stops after the desired number of edge events has been
detected. To re-enable the timer, ensure that the TnEN bit is cleared and repeat step 4 on page 167
through step 9 on page 167.
16-Bit Input Edge Timing Mode
A timer is configured to Input Edge Timing mode by the following sequence:
1.
2.
3.
4.
5.
6.
7.
8.
Ensure the timer is disabled (the TnEN bit is cleared) before making any changes.
Write the GPTM Configuration (GPTMCFG) register with a value of 0x4.
In the GPTM Timer Mode (GPTMTnMR) register, write the TnCMR field to 0x0 and the TnMR
field to 0x3.
Configure the type of event(s) that the timer captures by writing the TnEVENT field of the GPTM
Control (GPTMCTL) register.
Load the timer start value into the GPTM Timern Interval Load (GPTMTnILR) register.
Load the desired event count into the GPTM Timern Match (GPTMTnMATCHR) register.
If interrupts are required, set the CnMIM bit in the GPTM Interrupt Mask (GPTMIMR) register.
Set the TnEN bit in the GPTMCTL register to enable the timer and begin waiting for edge events.
Poll the CnMRIS bit in the GPTMRIS register or wait for the interrupt to be generated (if enabled).
In both cases, the status flags are cleared by writing a 1 to the CnMCINT bit of the GPTM
Interrupt Clear (GPTMICR) register.
Ensure the timer is disabled (the TnEN bit is cleared) before making any changes.
Write the GPTM Configuration (GPTMCFG) register with a value of 0x4.
In the GPTM Timer Mode (GPTMTnMR) register, write the TnCMR field to 0x1 and the TnMR
field to 0x3.
Configure the type of event that the timer captures by writing the TnEVENT field of the GPTM
Control (GPTMCTL) register.
Load the timer start value into the GPTM Timern Interval Load (GPTMTnILR) register.
If interrupts are required, set the CnEIM bit in the GPTM Interrupt Mask (GPTMIMR) register.
Set the TnEN bit in the GPTM Control (GPTMCTL) register to enable the timer and start counting.
Poll the CnERIS bit in the GPTMRIS register or wait for the interrupt to be generated (if enabled).
In both cases, the status flags are cleared by writing a 1 to the CnECINT bit of the GPTM
Preliminary
LM3S300 Microcontroller
167