LM3S300 Luminary Micro, Inc, LM3S300 Datasheet - Page 134

• Manufacturer Part Number: LM3S300
• Description: Lm3s300 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Reset
Reset
Type
Type
General-Purpose Input/Outputs (GPIOs)
GPIO Masked Interrupt Status (GPIOMIS)
GPIO Port A base: 0x4000.4000
GPIO Port B base: 0x4000.5000
GPIO Port C base: 0x4000.6000
GPIO Port D base: 0x4000.7000
GPIO Port E base: 0x4002.4000
Offset 0x418
Type RO, reset 0x0000.0000
134
Bit/Field
31:8
7:0
RO
RO
31
15
0
0
RO
RO
Register 8: GPIO Masked Interrupt Status (GPIOMIS), offset 0x418
The GPIOMIS register is the masked interrupt status register. Bits read High in GPIOMIS reflect
the status of input lines triggering an interrupt. Bits read as Low indicate that either no interrupt has
been generated, or the interrupt is masked.
GPIOMIS is the state of the interrupt after masking.
30
14
0
0
RO
RO
29
13
reserved
0
0
Name
MIS
RO
RO
28
12
0
0
reserved
RO
RO
27
11
0
0
Type
RO
RO
RO
RO
26
10
0
0
RO
RO
Reset
25
0x00
0x00
0
9
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
GPIO Masked Interrupt Status
Masked value of interrupt due to corresponding pin.
The MIS values are defined as follows:
Value
0
1
RO
RO
23
0
7
0
Description
Corresponding GPIO line interrupt not active.
Corresponding GPIO line asserting interrupt.
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
MIS
RO
RO
19
0
3
0
RO
RO
18
0
2
0
RO
RO
17
0
1
0
June 04, 2008
RO
RO
16
0
0
0