LM3S3749 Luminary Micro, Inc, LM3S3749 Datasheet - Page 673

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LM3S3749

Manufacturer Part Number
LM3S3749
Description
Lm3s3749 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Reset
Reset
Type
Type
QEI Interrupt Status and Clear (QEIISC)
QEI0 base: 0x4002.C000
Offset 0x028
Type R/W1C, reset 0x0000.0000
June 02, 2008
Bit/Field
31:4
RO
RO
3
2
1
0
31
15
0
0
RO
RO
Register 11: QEI Interrupt Status and Clear (QEIISC), offset 0x028
This register provides the current set of interrupt sources that are asserted to the controller. Bits set
to 1 indicate the latched events that have occurred; a zero bit indicates that the event in question
has not occurred. This is a R/W1C register; writing a 1 to a bit position clears the corresponding
interrupt reason.
30
14
0
0
RO
RO
29
13
reserved
0
0
IntTimer
IntIndex
IntError
Name
IntDir
RO
RO
28
12
0
0
RO
RO
27
11
0
0
R/W1C
R/W1C
R/W1C
R/W1C
Type
RO
RO
RO
26
10
0
0
reserved
RO
RO
Reset
25
0x00
0
9
0
0
0
0
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Phase Error Interrupt
Indicates that a phase error was detected.
Direction Change Interrupt
Indicates that the direction has changed.
Velocity Timer Expired Interrupt
Indicates that the velocity timer has expired.
Index Pulse Interrupt
Indicates that the index pulse has occurred.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
IntError
R/W1C
RO
19
0
3
0
LM3S3749 Microcontroller
R/W1C
IntDir
RO
18
0
2
0
IntTimer
R/W1C
RO
17
0
1
0
IntIndex
R/W1C
RO
16
0
0
0
673

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