LT1766 Linear Technology, LT1766 Datasheet - Page 22

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LT1766

Manufacturer Part Number
LT1766
Description
5.5V to 60V 1.5A/ 200kHz Step-Down Switching Regulator
Manufacturer
Linear Technology
Datasheet

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LT1766/LT1766-5
APPLICATIO S I FOR ATIO
When using R
First, the combination of output capacitor ESR and R
stop the loop rolling off altogether. Second, if the loop gain
is not rolled off sufficiently at the switching frequency,
output ripple will peturb the V
unstable duty cycle switching similar to subharmonic
oscillations. If needed, an additional capacitor CF can be
added across the R
to further suppress V
With a tantalum output capacitor, the LT1766 already
includes a resistor, R
(see Figures 10 and 11) to compensate the loop over the
entire V
V
still be used with a simple adjustment to the resistor R
stable operation. (See Ceramic Capacitors section for
stabilizing LT1766). If additional phase margin is required,
a capacitor, CFB, can be inserted between the output and
FB pin but care must be taken for high output voltage
applications. Sudden shorts to the output can create
unacceptably large negative transients on the FB pin.
For V
possible by readjusting the frequency compensation com-
ponents at the V
When checking loop stability, the circuit should be oper-
ated over the applications’s full voltage, current and tem-
perature range. Proper loop compensation may be ob-
tained by emperical methods as described in detail in
Application Notes 19 and 76.
22
IN
-to-V
IN
-to-V
IN
OUT
range (to allow for stable pulse skipping for high
OUT
ratios 10). A ceramic output capacitor can
C
, the maximum value has two limitations.
C
REMOVABLE
ratios <10, higher loop bandwidths are
pin.
C
U
/C
C
INPUT
C
C
and filter capacitor, CF, at the V
ripple voltage.
network from the V
U
10MQ060N
R3
54k
R4
25k
D3
C
pin enough to cause
W
Figure 12. Dual Source Supply with 25 A Reverse Leakage
C3
2.2 F
C
pin to ground
V
SHDN
SYNC
U
GND
0.022 F
IN
LT1766
BOOST
2.2k
C
C
R
C
C
C
may
C
pin
for
BIAS
V
SW
FB
C
C
220pF
0.33 F
F
CONVERTER WITH BACKUP OUTPUT REGULATOR
In systems with a primary and backup supply, for ex-
ample, a battery powered device with a wall adapter input,
the output of the LT1766 can be held up by the backup
supply with the LT1766 input disconnected. In this condi-
tion, the SW pin will source current into the V
SHDN pin is held at ground, only the shut down current of
25 A will be pulled via the SW pin from the second supply.
With the SHDN pin floating, the LT1766 will consume its
quiescent operating current of 1.5mA. The V
source current to any other components connected to the
input line. If this load is greater than 10mA or the input
could be shorted to ground, a series Schottky diode must
be added, as shown in Figure 12. With these safeguards,
the output can be held at voltages up to the V
maximum rating.
BUCK CONVERTER WITH ADJUSTABLE SOFT-START
Large capacitive loads or high input voltages can cause
high input currents at start-up. Figure 13 shows a circuit
that limits the dv/dt of the output at start-up, controlling
the capacitor charge rate. The buck converter is a typical
configuration with the addition of R3, R4, C
As the output starts to rise, Q1 turns on, regulating switch
current via the V
output. Output rise time is controlled by the current
through C
is in regulation, Q1 turns off and the circuit operates
normally. R3 is transient protection for the base of Q1.
C2
D1
10MQ060N
47 H
L1
SS
defined by R4 and Q1’s V
1N4148W
R1
15.4k
R2
4.99k
D2
C
pin to maintain a constant dv/dt at the
+
5V, 1A
C1
100 F
10V
ALTERNATE
SUPPLY
1766 F12
BE
. Once the output
IN
IN
pin will also
SS
IN
pin. If the
absolute
and Q1.
1766fa

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