S29GL256N10TFI023 ETC, S29GL256N10TFI023 Datasheet - Page 18

• Manufacturer Part Number: S29GL256N10TFI023
• Description: MirrorBit Flash Family
• Manufacturer: ETC

18
Sector
SA10
SA11
SA12
SA13
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
RESET#: Hardware Reset Pin
Output Disable Mode
0
0
0
0
0
0
0
0
0
0
0
0
0
0
trol signals. Standard address access timings provide new data when addresses
are changed. While in sleep mode, output data is latched and always available to
the system. Refer to the “DC Characteristics” section on page 86 for the
automatic sleep mode current specification.
The RESET# pin provides a hardware method of resetting the device to reading
array data. When the RESET# pin is driven low for at least a period of t
device immediately terminates any operation in progress, tristates all output
pins, and ignores all read/write commands for the duration of the RESET# pulse.
The device also resets the internal state machine to reading array data. The op-
eration that was interrupted should be reinitiated once the device is ready to
accept another command sequence, to ensure data integrity.
Current is reduced for the duration of the RESET# pulse. When RESET# is held
at V
at V
The RESET# pin may be tied to the system reset circuitry. A system reset would
thus also reset the Flash memory, enabling the system to read the boot-up firm-
ware from the Flash memory.
Refer to the AC Characteristics tables for RESET# parameters and to Figure 13
for the timing diagram.
When the OE# input is at V
are placed in the high impedance state.
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IL
SS
±0.3 V, the device draws CMOS standby current (I
but not within V
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
A24–A16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Table 2. Sector Address Table–S29GL512N
0
0
0
0
0
0
0
0
1
1
1
1
1
1
SS
S29GLxxxN MirrorBitTM Flash Family
±0.3 V, the standby current will be greater.
0
0
0
0
1
1
1
1
0
0
0
0
1
1
IH
A d v a n c e
, output from the device is disabled. The output pins
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Sector Size
(Kbytes/
Kwords)
128/64
128/64
128/64
128/64
128/64
128/64
128/64
128/64
128/64
128/64
128/64
128/64
128/64
128/64
I n f o r m a t i o n
CC5
(in hexadecimal)
00A0000–00BFFFF
00C0000–00DFFFF
01A0000–01BFFFF
0000000–001FFFF
0020000–003FFFF
0040000–005FFFF
0060000–007FFFF
0080000–009FFFF
00E0000–00FFFFF
0100000–011FFFF
0120000–013FFFF
0140000–015FFFF
0160000–017FFFF
0180000–019FFFF
Address Range
). If RESET# is held
8-bit
RP
, the
(in hexadecimal)
00D0000–00DFFFF
00A0000–00AFFFF
00B0000–00BFFFF
00C0000–00CFFFF
0000000–000FFFF
0010000–001FFFF
0020000–002FFFF
0030000–003FFFF
0040000–004FFFF
0050000–005FFFF
0060000–006FFFF
0070000–007FFFF
0080000–008FFFF
0090000–009FFFF
Address Range
27631A4 May 13, 2004
16-bit