S29GL256N10TFI023 ETC, S29GL256N10TFI023 Datasheet - Page 78

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S29GL256N10TFI023

Manufacturer Part Number
S29GL256N10TFI023
Description
MirrorBit Flash Family
Manufacturer
ETC
Datasheet
4. Data bits DQ15-DQ8 are don't cares for unlock and command cycles.
5. Address bits A
6. No unlock or command cycles required when reading array data.
7. The Reset command is required to return to reading array data when device is in the autoselect mode, or if DQ5 goes high
8. The fourth, fifth, and sixth cycle of the autoselect command sequence is a read cycle.
9. The data is 00h for an unprotected sector and 01h for a protected sector. See “Autoselect Command Sequence” for more
10. The data value for DQ7 is “1” for a serialized and protected OTP region and “0” for an unserialized and unprotected
11. Command is valid when device is ready to read array data or when device is in autoselect mode.
12. The system may read and program/program suspend in non-erasing sectors, or enter the autoselect mode, when in the
13. The Erase Resume/Program Resume command is valid only during the Erase Suspend/Program Suspend modes.
14. Issue this command sequence to return to READ mode after detecting device is in a Write-to-Buffer-Abort state. NOTE: the
15. S29GL512NH/L = 2223h/23h, 220h/01h; S29GL256NH/L = 2222h/22h, 2201h/01h; S29GL128NH/L = 2221h/21h, 2201h/
16. The Exit command returns the device to reading the array.
17. Note that the password portion can be entered or read in any order as long as the entire 64-bit password is entered or read.
18. For PWDx, only one portion of the password can be programmed per each “A0” command.
19. The All PPB Erase command embeds programming of all PPB bits before erasure.
20. All Lock Register bits are one-time programmable. Note that the program state = “0” and the erase state = “1”. Also note
21. If any of the Entry command was initiated, an Exit command must be issued to reset the device into read mode. Otherwise
22. If ACC = V
Protected State = “00h”, Unprotected State = “01h”.
78
Address pin.).
(while the device is providing status data).
information. This is same as PPB Status Read except that the protect and unprotect statuses are inverted here.
SecSi™ Sector region. See "SecSi™ Sector Flash Memory Region” for more information. For S29GLxxxNH.: XX18h/18h = Not
Factory Locked. XX98h/98h = Factory Locked. For S29GLxxxNL: XX08h/08h = Not Factory Locked. XX88h/88h = Factory
Locked.
Erase Suspend mode. The Erase Suspend command is valid only during a sector erase operation.
full command sequence is required if resetting out of ABORT while using Unlock Bypass Mode.
01h.
that of both the Persistent Protection Mode Lock Bit and the Password Protection Mode Lock Bit cannot be programmed at the
same time or the Lock Register Bits Program operation will abort and return the device to read mode. Lock Register bits that
are reserved for future use will default to “1's”. The Lock Register is shipped out as “FFFF's” before Lock Register Bit program
execution.
the device will hang.
Write Operation Status
DQ7: Data# Polling
HH
, sector protection will match when ACC = V
MAX
The device provides several bits to determine the status of a program or erase
operation: DQ2, DQ3, DQ5, DQ6, and DQ7. Table 19 and the following subsec-
tions describe the function of these bits. DQ7 and DQ6 each offer a method for
determining whether a program or erase operation is complete or in progress.
The device also provides a hardware-based output signal, RY/BY#, to determine
whether an Embedded Program or Erase operation is in progress or has been
completed.
Note that all Write Operation Status DQ bits are valid only after 4 µs delay.
The Data# Polling bit, DQ7, indicates to the host system whether an Embedded
Program or Erase algorithm is in progress or completed, or whether the device is
in Erase Suspend. Data# Polling is valid after the rising edge of the final WE#
pulse in the command sequence.
During the Embedded Program algorithm, the device outputs on DQ7 the com-
plement of the datum programmed to DQ7. This DQ7 status also applies to
programming during Erase Suspend. When the Embedded Program algorithm is
complete, the device outputs the datum programmed to DQ7. The system must
provide the program address to read valid status information on DQ7. If a pro-
:A16 are don't cares for unlock and command cycles, unless SA or PA required. (A
S29GLxxxN MirrorBitTM Flash Family
A d v a n c e
IH
I n f o r m a t i o n
MAX
is the Highest
27631A4 May 13, 2004

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