upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 159

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upd78f9211grt2-jjg-a

Manufacturer Part Number
upd78f9211grt2-jjg-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
ETC-unknow
Datasheet
9.4.3
ANI3 by the analog input channel specification register (ADS) and A/D conversion is executed.
(1) A/D conversion operation
The operation mode of the A/D converter is the select mode. One channel of analog input is selected from ANI0 to
A/D conversion
By setting bit 7 (ADCS) of the A/D converter mode register (ADM) to 1, the A/D conversion operation of the
voltage, which is applied to the analog input pin specified by the analog input channel specification register
(ADS), is started.
When A/D conversion has been completed, the result of the A/D conversion is stored in the A/D conversion result
register (ADCR, ADCRH), and an interrupt request signal (INTAD) is generated. Once the A/D conversion has
started and when one A/D conversion has been completed, the next A/D conversion operation is immediately
started. The A/D conversion operations are repeated until new data is written to ADS.
If ADM or ADS is written during A/D conversion, the A/D conversion operation under execution is stopped and
restarted from the beginning.
If 0 is written to ADCS during A/D conversion, A/D conversion is immediately stopped.
conversion result is undefined.
Remarks 1. n = 0 to 3
A/D converter operation mode
ADCRH
ADCR,
INTAD
2. m = 0 to 3
Rewriting ADM
ADCS = 1
ANIn
Figure 9-12. A/D Conversion Operation
CHAPTER 9 A/D CONVERTER
User’s Manual U16994EJ3V0UD
ANIn
ANIn
Conversion is stopped
Conversion result is not retained
Rewriting ADS
ANIn
ANIn
ANIm
ANIm
ADCS = 0
ANIm
At this time, the
Stopped
159

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