upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 163

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upd78f9211grt2-jjg-a

Manufacturer Part Number
upd78f9211grt2-jjg-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
ETC-unknow
Datasheet
9.6
(1) Operating current in STOP mode
(2) Input range of ANI0 to ANI3
(3) Conflicting operations
(4) Noise countermeasures
The A/D converter stops operating in the STOP mode. At this time, the operating current can be reduced by
clearing bit 7 (ADCS) of the A/D converter mode register (ADM) to 0.
Observe the rated range of the ANI0 to ANI3 input voltage. If a voltage of V
the range of absolute maximum ratings) is input to an analog input channel, the converted value of that channel
becomes undefined. In addition, the converted values of the other channels may also be affected.
<1> Conflict between A/D conversion result register (ADCR, ADCRH) write and ADCR, ADCRH read by
<2> Conflict between ADCR, ADCRH write and A/D converter mode register (ADM) write or analog input
To maintain the 10-bit resolution, attention must be paid to noise input to the V
<1> Connect a capacitor with a low equivalent resistance and a high frequency response to the power supply.
<2> Because the effect increases in proportion to the output impedance of the analog input source, it is
<3> Do not switch the A/D conversion function of the ANI0 to ANI3 pins to their alternate functions during
<4> The conversion accuracy can be improved by setting HALT mode immediately after the conversion starts.
Cautions for A/D Converter
Reference
C = 0.01 to 0.1 F
instruction upon the end of conversion
ADCR, ADCRH read has priority. After the read operation, the new conversion result is written to ADCR,
ADCRH.
channel specification register (ADS) write upon the end of conversion
ADM or ADS write has priority. ADCR, ADCRH write is not performed, nor is the conversion end interrupt
signal (INTAD) generated.
recommended that a capacitor be connected externally, as shown in Figure 9-19, to reduce noise.
conversion.
voltage
input
µ
Figure 9-19. Analog Input Pin Connection
CHAPTER 9 A/D CONVERTER
User’s Manual U16994EJ3V0UD
V
V
ANI0 to ANI3
DD
SS
If there is a possibility that noise equal to or higher than V
equal to or lower than V
small V
F
value (0.3 V or lower).
SS
may enter, clamp with a diode with a
DD
DD
or higher and V
pin and ANI0 to ANI3 pins.
SS
or lower (even in
DD
or
163

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