upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 209

• Manufacturer Part Number: upd78f9211grt2-jjg-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: ETC-unknow

15.2 Format of Option Byte
Format of option bytes is shown below.
Caution The setting of this option is valid only when the crystal/ceramic oscillation clock is selected
Caution Because the option byte is referenced after reset release, if a low level is input to the RESET
Caution Because the X1 and X2 pins are also used as the P23/ANI3 and P22/ANI2 pins, the conditions
Remark
Address: 0080H
DEFOSTS1
OSCSEL1
RMCE
7
1
1
0
0
0
1
0
0
1
1
as the system clock source. No wait time elapses if the high-speed internal oscillation clock
or external clock input is selected as the system clock source.
pin before the option byte is referenced, then the reset state is not released.
Also, when setting 0 to RMCE, connect the pull-up resistor.
under which the X1 and X2 pins can be used differ depending on the selected system clock
source.
(1) Crystal/ceramic oscillation clock is selected
(2) External clock input is selected
(3) High-speed internal oscillation clock is selected
× : don’t care
DEFOSTS1
DEFOSTS0
The X1 and X2 pins cannot be used as I/O port pins or analog input pins of A/D converter
because they are used as clock input pins.
Because the X1 pin is used as an external clock input pin, P23/ANI3 cannot be used as
an I/O port pin or an analog input pin of A/D converter.
P23/ANI3 and P22/ANI2 pins can be used as I/O port pins or analog input pins of A/D
converter.
OSCSEL0
RESET pin is used as is.
RESET pin is used as input port pin (P34).
0
1
×
6
0
1
0
1
DEFOSTS0
2
2
2
2
Crystal/ceramic oscillation clock
External clock input
High-speed internal oscillation clock
10
12
15
17
Figure 15-2. Format of Option Byte (1/2)
/fx (102.4
/fx (409.6
/fx (3.27 ms)
/fx (13.1 ms)
5
Oscillation stabilization time on power application or after reset release
CHAPTER 15 OPTION BYTE
User’s Manual U16994EJ3V0UD
µ
µ
s)
s)
4
1
Control of RESET pin
Selection of system clock source
RMCE
3
OSCSEL1
2
OSCSEL0
1
LIOCP
0
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