upd78f0114m6gb-8es Renesas Electronics Corporation., upd78f0114m6gb-8es Datasheet - Page 341

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upd78f0114m6gb-8es

Manufacturer Part Number
upd78f0114m6gb-8es
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
17.2 Standby Function Operation
17.2.1 HALT mode
(1) HALT mode
Notes 1.
Item
System clock
CPU
Port (output latch)
16-bit timer/event counter 00
8-bit timer/event counter 50
8-bit timer/event counter 51
8-bit timer H0
8-bit timer H1
Watch timer
Watchdog
timer
A/D converter
Serial
interface
Clock monitor
Power-on-clear function
Low-voltage detection function
External interrupt
The HALT mode is set by executing the HALT instruction. HALT mode can be set regardless of whether the CPU
clock before the setting was the X1 input clock, Ring-OSC clock, or subsystem clock.
The operating statuses in the HALT mode are shown below.
2.
3.
4.
5.
HALT Mode Setting
Ring-OSC cannot
be stopped
Ring-OSC can be
stopped
UART0
UART6
CSI10
When “Stopped by software” is selected for Ring-OSC by a mask option and Ring-OSC is stopped by
software (for mask options, see CHAPTER 22 MASK OPTIONS).
Operable when the X1 input clock is selected.
Operation not guaranteed when other than subsystem clock is selected.
“Ring-OSC cannot be stopped” or “Ring-OSC can be stopped by software” can be selected by a mask
option.
When “POC used” is selected by a mask option.
Note 4
Note 5
Note 4
Clock supply to the CPU is stopped.
Operation stopped
Status before HALT mode was set is retained
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Operation stopped
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Clock Used
Subsystem
Oscillation Continues
When HALT Instruction Is Executed While CPU Is
When
Table 17-2. Operating Statuses in HALT Mode (1/2)
When Ring-OSC
Operating on X1 Input Clock
Operable
Subsystem
Clock Not
CHAPTER 17 STANDBY FUNCTION
When
Used
User’s Manual U16227EJ3V0UD
Note 2
Operable
Operation stopped
Clock Used
Subsystem
Oscillation Stopped
When
When Ring-OSC
Operable
Subsystem
Clock Not
When
Used
Note 1
Note 2
Operation not guaranteed
TI50 is selected
TI51 is selected
Operation not guaranteed when count clock other than
TM50 output is selected during 8-bit timer/event
counter 50 operation
Operation not guaranteed when count clock other than
f
Operable
Operable
Operation not guaranteed
Operation not guaranteed when serial clock other than
TM50 output is selected during TM50 operation
Operation not guaranteed when serial clock other than
external SCK10 is selected
Operable
Operation not guaranteed when count clock other than
Operation not guaranteed when count clock other than
Clock Used
Subsystem
R
/2
When X1 Input Clock
Oscillation Continues
When HALT Instruction Is Executed While CPU Is
When
7
is selected
Note 3
Operating on Ring-OSC Clock
Operation not
guaranteed
Subsystem
Clock Not
When
Used
Operable
Operation stopped
Clock Used
Subsystem
When X1 Input Clock
When
Oscillation Stopped
Note 3
Operation not
guaranteed
Subsystem
Clock Not
When
Used
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