sm5903b Seiko NPC Corp., sm5903b Datasheet - Page 21

• Manufacturer Part Number: sm5903b
• Description: Shock-proof Memory Controller
• Manufacturer: Seiko NPC Corp.

RAM addresses
The SM5903BF uses either 1 or 2 external 1M or
4M DRAMs as external buffers.
Three kinds of addresses are used for external
RAM control.
Among these, VWA is the write address for con-
forming data whose validity has been confirmed.
Determination of the correctness of data read from
the CD is delayed relative to the encode write pro-
cessing, so VWA is always delayed relative to WA.
The region available for valid data is the area
between VWA-RA.
- Connect data work area
VWA (valid write address)
The VWA is determined according to the YBLKCK
pin and WAQV command. Refer to the timing chart
below.
1.YBLKCK is a 75 Hz clock(HIGH for 136 µs) when
used for normal read mode and it is a 150 Hz clock
when used for double-speed read mode, synchro-
nized to the CD format block end timing.
When this clock goes LOW, WA which is the write
address of internal encode sequence, is stored
(see note 2).
This is an area of memory reserved for connect
data. This area is 2k bits if using 1M DRAMs, 4k
bits if using 4M DRAMs, or 8k bits if using 16M
DRAMs.
WA (write address)
RA (read address)
VWA (valid write address)
Refer to Microcontroller interface
Microcontroller data set
YBLKCK
VWA
Fig 2. YBLKCK and VWA relationship
Values shown are for rate fs. The values are 1/2 those shown at rate 2fs.
VWA(x)
SM5903BF
VWA latch set
2.The microcontroller checks the subcode and, if
confirmed to be correct, generates a WAQV com-
mand (80H).
3.When the WAQV command is received, the previ-
ously latched WA is stored as the VWA.
(note 2) Actually, there is a small time difference, or
gap, between the input data and YBLKCK. This gap
serves to preserves the preceding WA to protect
against incorrect operation.
WAQV set
VWA
WA
13.3ms
VWA(x + 1)
Fig 1. RAM addresses
NIPPON PRECISION CIRCUITS-21
Connect data work area
Valid data
area
RA