cs4412 Cirrus Logic, Inc., cs4412 Datasheet
cs4412
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cs4412 Summary of contents
Page 1
... The low R DS(ON) delivering 85% efficiency. This efficiency provides for a small device package and lower power supplies. The CS4412 is available in a 48-pin QFN package in Commercial grade (-40 to +70° C). The CRD4412 cus- tomer reference design is also available. Please refer to “Ordering Information” on page 22 ing information. ...
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... Table 1. I/O Power Rails ............................................................................................................................. 7 Table 2. Output Mode Configuration Options ............................................................................................ 13 Table 3. Low-Pass Filter Components - Half-Bridge ................................................................................. 14 Table 4. DC-Blocking Capacitors Values - Half-Bridge ............................................................................. 15 Table 5. Low-Pass Filter Components - Full-Bridge ................................................................................. 15 Table 6. Over-current Error Conditions ..................................................................................................... 16 Table 7. Thermal and Under-Voltage Error Conditions ............................................................................. 16 Table 8. VD Supply Level Indication ......................................................................................................... 17 2 CS4412 DS749A1 ...
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... Core Analog Power (Output) - Filter connection for internally generated power supply for the low 13 VA_REG voltage analog circuitry DS749A1 CS4412 Top-Down View 48-Pin QFN Package Pin Description 14. CS4412 OUT1 35 PGND 34 PGND 33 OUT2 OUT3 29 PGND 28 PGND 27 OUT4 “Output ...
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... Ramp-up/down Select (Input) - Set high to enable ramping. When set low, ramping is disabled. 45 RAMP See “PWM Popguard Transient Control” on page 4 Pin Description “Device Protection and Error Reporting” on page “Device Protection and Error Reporting” on page 17 “Device Protection and Error Reporting” on page CS4412 17. This pins should not be left float- 17. 17. 13. DS749A1 ...
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... Symbol VD 2.375 VD 3.135 VD VP Commercial (Note 1) Symbol VP No Output Switching VP (Note 2) VD (Note 2) (Note (Note 4) V IND (Note 2) Commercial stg CS4412 Min Nom Max Units 2.5 2.625 V 3.3 3.465 V 4.75 5.0 5.25 V 8.1 19.8 V -40 - +70 °C - +150 °C Min Max Units -0.3 19.8 V -0.3 23.0 V -0.3 6 ± ...
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... DS(ON 11 Ω Load min t Resistive Load r t Resistive Load f I OCREF = 16.2 kΩ Capacitor = 1000 µ Capacitor = 1000 µF RD CS4412 = 25° Min Typ Max Units - 5 23 0.1 - ...
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... GND = PGND = 0 V; All voltages with respect to ground; Unless otherwise specified. Parameters High-Level Input Voltage Low-Level Input Voltage High-Level Output Voltage Input Leakage Current Input Capacitance DS749A1 (Notes 3 3 (Note Symbol CS4412 Min Typ Max - 4 100 - 2.25 2.5 2. 2.25 2.5 2 ...
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... V-5.0 V, Open Drain Output 2.5 V-5.0 V, Open Drain Output 2.5 V-5.0 V, Open Drain Output 2.5 V-5.0 V, Open Drain Input - Input/ - Output 9 V-18 V Power MOSFET Output 9 V-18 V Power MOSFET Output 9 V-18 V Power MOSFET Output 9 V-18 V Power MOSFET Table 1. I/O Power Rails CS4412 Receiver 2.5 V-5.0 V 2.5 V-5.0 V 2.5 V-5.0 V 2.5 V-5.0 V 2.5 V-5.0 V 2.5 V-5.0 V 2.5 V-5.0 V 2.5 V-5.0 V 2.5 V-5 2.5 V-5.0 V 2.5 V-5 ...
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... OCREF 22 Figure 1. Stereo Full-Bridge Typical Connection Diagram DS749A1 470 µF 0.1 µF 0.1 µF 0.1 µ RAMP_CAP CS4412 CS4412 + +18 V 0.1 µ Output OUT1 35 Filter Output OUT2 32 Filter Output OUT3 29 Filter Output OUT4 26 Filter GND 10 GND ...
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... OCREF 22 Figure 2. 2.1 Channel Typical Configuration Diagram 10 470 µF 0.1 µF 0.1 µF 0.1 µ RAMP_CAP CS4412 CS4412 + +18 V 0.1 µF 470 µF 470 µ Output OUT1 35 Filter Output OUT2 32 Filter Output OUT3 29 Filter Output OUT4 26 Filter GND ...
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... Figure 3. 4-Channel Half-Bridge Typical Connection Diagram DS749A1 470 µF 470 µF 0.1 µF 0.1 µF 0.1 µ RAMP_CAP CS4412 CS4412 + +18 V 0.1 µF 470 µF 470 µF 390 Output OUT1 35 Filter Output OUT2 32 Filter Output OUT3 29 Filter Output ...
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... OCREF 21 22 Figure 4. Mono Parallel Full-Bridge Typical Connection Diagram 12 470 µF 0.1 µF 0.1 µF 0.1 µ RAMP_CAP CS4412 CS4412 + +18 V 0.1 µ OUT1 35 Output Filter OUT2 32 OUT3 29 Output Filter OUT4 26 GND 10 GND 14 GND 15 GND 16 ...
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... When RSTx/y is low, the corresponding channels of the CS4412 enter a low-power mode and all of the channels’ internal states are reset and the outputs are set to HI-Z. When RSTx/y is high, the desired mode settings will be loaded and the outputs will begin normal operation ...
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... Recommended Power-Down Sequence 1. Mute the logic-level PWM inputs present on IN1 - IN4 by applying 50 % duty-cycle inputs. 2. Set RSTx/y low. If the CS4412 is configured for ramping, the outputs will ramp down to PGND and then become HI-Z. If the CS4412 is not configured for ramping, the outputs will immediately become HI-Z ...
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... Zetex ZHCS400 or 220 pF equivalent Figure 5. Output Filter - Half-Bridge Load L1 4 Ω 22 µH 6 Ω 33 µH 8 Ω 47 µH Table 3. Low-Pass Filter Components - Half-Bridge Table 4 shows the component values for C2 based on corner frequency CS4412 Table 3 shows the component values for C1 1.0 µF 0.68 µF 0.47 µF 15 ...
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... VP Figure 6. Output Filter - Full-Bridge Load L1 4 Ω 10 µH 6 Ω 15 µH 8 Ω 22 µH Table 5. Low-Pass Filter Components - Full-Bridge CS4412 C2 1000 µF 680 µF 330 µF 680 µF 390 µF 220 µF 470 µF 330 µF 180 µ 1.0 µ ...
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... Device Protection and Error Reporting The CS4412 has built-in protection circuitry for over-current, under-voltage, and thermal warning/overload conditions. The levels of the over-current error, thermal error, and VP under-voltage trip points are listed in the PWM Power Output Characteristics of these preset thresholds are crossed. ...
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... It is necessary to decouple the power supply by placing capacitors directly between the power and ground of the CS4412. Decoupling capacitors should be as close to the pins of the CS4412 as possible. The lowest value ceramic capacitor should be closest to the pin and should be mount the same side of the board as the CS4412 to minimize inductance effects ...
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... Total Harmonic Distortion + Noise (THD+N) The ratio of the rms value of the signal to the rms sum of all other spectral components over the specified band width (typically kHz), including distortion components. Expressed in decibels. Measured at -1 and -20 dBFS as suggested in AES17-1991 Annex A. DS749A1 CS4412 19 ...
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... Dimensioning lead width applies to the plated terminal and is measured between 0.20 mm and 0.25 mm from the terminal tip Side View NOM MAX MIN -- 0.0354 -- -- 0.0020 0.00 0.0157 0.30 0.2736 6.65 0.2736 6.65 0.0276 0.45 JEDEC #: MO-220 Controlling Dimension is Millimeters. CS4412 Bottom View MILLIMETERS NOM MAX -- 0.90 -- 0.05 0.35 0.40 9.00 BSC 6.80 6.95 9.00 BSC 6.80 6.95 0.65 BSC 0.55 0.70 DS749A1 Pin #1 ID NOTE 1 1 ...
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... PCB. In either case beneficial to use copper fill in any unused regions inside the PCB layout, especially those immediately surrounding the CS4412. In addition to improving in electrical performance, this practice also aids in heat dissipation. ...
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... Cirrus Logic, Cirrus, and the Cirrus Logic logo designs, and Popguard are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. 22 Package Temp Range Container Pb-Free Grade 48-QFN Yes Commercial - - - - - - Changes CS4412 Order# Rail CS4412-CNZ -40° to +70°C Tape and CS4412-CNZR Reel - - CRD4412 - - CRD4525 DS749A1 ...