cs1501 Cirrus Logic, Inc., cs1501 Datasheet - Page 11

• Manufacturer Part Number: cs1501
• Description: Digital Power Factor Correction Control Ic
• Manufacturer: Cirrus Logic, Inc.

Resistor R
follows:
By using digital loop compensation, the voltage feedback
signal does not require an external compensation network.
A current proportional to the AC input voltage is supplied to the
IC on pin IAC and is used by the PFC control algorithm.
Resistor R
For optimal performance, resistors R
tolerance or better resistors for best V
5.7 Valley Switching
The zero-current detection (ZCD) pin is monitored for
demagnetization in the auxiliary winding of the boost inductor
(L
valley/zero crossings by sensing the voltage transformed onto
the auxiliary winding of L
The objective of zero-voltage switching is to initiate each
MOSFET switching cycle when its drain-source voltage is at
the lowest possible voltage potential, thus reducing switching
DS927PP6
B
). The ZCD circuit is designed to detect the V
I
V
Aux
+
Aux
-
V
IAC
IFB
I
rect
R
AC
Figure 19. ZCD Input Pin Model
IFB
Figure 18. IAC Input Pin Model
sets the I
sets the feedback current and is calculated as
R3
R4
I
Z CD
=
L
B
V
---------------------------- -
R1
R2
link
ZCD
C
AC
R
p
N:1
R
I
B
IA C
IAC
ref
5
–
.
IAC
current and is derived as follows:
V
CS1501
V
3
DD
th( Z CD)
=
R
Comparator
=
IFB
+
Demag
-
8
15k
400V V
------------------------------ -
IAC
V DD
24k
link
129mA
D2
& R
voltage accuracy.
ZCD_below_z ero
–
FE T Drain
IFB
V
CS1501
DD
link
ADC
should use 1%
I
ref
[Eq.4]
[Eq.5]
Aux
losses. CS1501 uses an auxiliary winding on the PFC boost
inductor to implement zero-voltage switching.
During each switching cycle, when the boost diode current
reaches zero, the boost MOSFET drain-source voltage begins
oscillating at the resonant frequency of the boost inductor and
MOSFET parasitic output capacitance. The ZCD_below_zero
signal transitions from high to low just prior to a local minimum
of the MOSFET drain-source voltage oscillation. The
zero-crossing detect circuit ensures that a ZCD_below_zero
pulse will only be generated when the comparator output is
continuously high for a nominal time period (t
Therefore, any negative edges on the comparator's output
due to spurious glitches will not cause a pulse to be
generated. Due to the CS1501’s variable-frequency control,
the MOSFET switching cycle will not always be initiated at the
first resonant valley.
The external circuitry should be designed so that the current
(I
below depicts approximate values for R3 and R4 for a range
of boost-to-auxiliary inductor turns ratio, N.
Resistors R3 and R4 were calculated using V
C
Equation 6 is used to calculate the cut-off frequency defined
by the RC circuit at the ZCD pin.
where:
f
C
c
ZCD_below _zero
ZCD
p
p
= 10pF.
Table 1. Aux Inductor Turns Ratio vs. R3 and R4
) at the ZCD pin is approximately 1.0 mA. The table
frequency
The cut-off frequency, f
Capacitance at the ZCD pin
10
11
12
13
14
15
N
9
Figure 20. Zero-voltage Switch
ZCD
f
c
=
1


37.5k
35.5k
29.5k
27.5k
2 R3 R4
46k
42k
32k
~R3

c
, needs to be 10x the ringing

C
p

1.75k
1.75k
1.75k
1.75k
1.75k
1.75k
1.75k
~R4
link
ZCB
CS1501
= 400V and
) of 200ns.
Zero Crossing
GD ‘ON’
Detection
[Eq.6]
11