st62t62c STMicroelectronics, st62t62c Datasheet - Page 57

• Manufacturer Part Number: st62t62c
• Description: 8-bit Otp/eprom Mcus With A/d Converter, Safe Reset, Auto-reload Timer And Eeprom
• Manufacturer: STMicroelectronics

Opcode Map Summary (Continued)
Abbreviations for Addressing Modes: Legend:
dir
sd
imm
inh
ext
b.d
bt
pcr
ind
HI
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
A
B
C
D
E
F
0
1
2
3
4
5
6
7
8
9
Direct
Short Direct
Immediate
Inherent
Extended
Bit Direct
Bit Test
Program Counter Relative
Indirect
LOW
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
1
2
1
2
1
2
1
2
1
2
1
2
1000
RNZ
8
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
JRNZ 4
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
4
1001
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
abc
9
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
ext 1
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
JP 2
b
rr
nn
abc
ee
#
e
1010
A
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
3 Bit Address
1 byte immediate data
12 bit address
Indicates Illegal Instructions
5 Bit Displacement
1byte dataspace address
8 bit Displacement
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
JRNC 4
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
pcr 2
1011
b0,rr
b0,rr
b4,rr
b4,rr
b2,rr
b2,rr
b6,rr
b6,rr
b1,rr
b1,rr
b5,rr
b5,rr
b3,rr
b3,rr
b7,rr
b7,rr
B
RES 2
RES 2
RES 2
RES 2
RES 2
RES 2
RES 2
RES 2
SET 2
SET 2
SET 2
SET 2
SET 2
SET 2
SET 2
SET 2
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
b.d 1
e
1100
C
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
JRZ 4
JRZ 4
JRZ 4
JRZ 4
JRZ 2
JRZ 4
JRZ 2
JRZ 4
JRZ
JRZ 4
JRZ 4
JRZ 4
JRZ 2
JRZ 4
JRZ 2
JRZ 4
pcr 3
pcr 1
pcr
pcr 1
pcr 1
pcr 1
pcr 1
pcr 1
pcr
pcr 1
pcr 1
pcr 1
pcr 1
pcr 1
pcr 1
pcr 1
Cycle
Operand
Bytes
Addressing Mode
1101
rr,nn
w,a
x,a
y,a
v,a
D
w
x
a
y
#
v
a
STOP 2
WAIT 2
COM 2
RETI 2
DEC 2
DEC 2
DEC 2
DEC 2
RCL 2
RET 2
imm 1
LDI 2
inh 1
inh 1
inh 1
inh 1
inh 1
LD 2
LD 2
LD 2
LD 2
sd 1
sd 1
sd 1
sd 1
sd 1
sd 1
sd 1
sd 1
ST62T52C ST62T62C/E62C
1
2
1
1110
E
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
JRC 4
2
1
prc 1
prc 2
prc 1
prc 2
prc 1
prc 2
prc 1
prc 2
prc 1
prc 2
prc 1
prc 2
prc 1
prc 2
prc 1
prc 2
e
JRC
1111
a,(y)
a,(y)
a,(y)
(y),a
a,(y)
a,(y)
a,rr
a,rr
a,rr
a,rr
rr,a
a,rr
prc
(y)
(y)
F
rr
rr
AND
DEC
ADD
ADD
AND
SUB
SUB
DEC
INC
INC
CP
CP
ind
LD
ind
ind
ind
LD
ind
LD
ind
ind
ind
LD
dir
dir
dir
dir
dir
dir
dir
dir
LOW
Mnemonic
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0000
0001
A
B
C
D
E
F
0
1
2
3
4
5
6
7
8
9
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HI