ad7868bq Analog Devices, Inc., ad7868bq Datasheet - Page 9

• Manufacturer Part Number: ad7868bq
• Description: Lc2mos Complete, 12-bit Analog I/o System
• Manufacturer: Analog Devices, Inc.

AD7868 DYNAMIC SPECIFICATIONS
The AD7868 is specified and 100% tested for dynamic perfor-
mance specifications as well as traditional dc specifications such
as integral and differential nonlinearity. These ac specifications
are required for signal processing applications such as speech
recognition, spectrum analysis, and high-speed modems. These
applications require information on the converter’s effect on the
spectral content of the input signal. Hence, the parameters for
which the AD7868 is specified include SNR, harmonic distor-
tion and peak harmonics. These terms are discussed in more de-
tail in the following sections.
Signal-to-Noise Ratio (SNR)
SNR is the measured signal-to-noise ratio at the output of the
ADC or DAC. The signal is the rms magnitude of the funda-
mental. Noise is the rms sum of all the nonfundamental signals
up to half the sampling frequency (fs/2) excluding dc. SNR is
dependent upon the number of levels used in the quantization
process; the more levels, the smaller the quantization noise. The
theoretical signal-to-noise ratio for a sine wave input is given by
where N is the number of bits. Thus for an ideal 12-bit con-
verter, SNR = 74 dB.
Effective Number of Bits
The formula given in Equation 1 relates the SNR to the number
of bits. Rewriting the formula, as in Equation 2, it is possible to
get a measure of performance expressed in effective number of
bits (N).
The effective number of bits for a device can be calculated di-
rectly from its measured SNR.
Harmonic Distortion
Harmonic distortion is the ratio of the rms sum of harmonics to
the fundamental. For the AD7868, total harmonic distortion
(THD) is defined as
where V
V
the sixth harmonic. The THD is also derived from the FFT plot
of the ADC or DAC output spectrum.
ADC Testing
The output spectrum from the ADC is evaluated by applying a
sine-wave signal of very low distortion to the V
sampled at an 83 kHz sampling rate. A Fast Fourier Transform
(FFT) plot is generated from which the SNR data can be ob-
tained. Figure 9 shows a typical 2048 point FFT plot of the
AD7868BQ ADC with an input signal of 10 kHz and a sam-
pling frequency of 83 kHz. The SNR obtained from this graph
is 73 dB. It should be noted that the harmonics are taken into
account when calculating the SNR.
REV. B
4
, V
5
and V
1
is the rms amplitude of the fundamental and V
THD
6
are the rms amplitudes of the second through to
SNR = (6.02N + 1.76) dB
N =
20 log
SNR –1.76
6.02
V
2
2
V
3
2
V
V
1
4
2
V
5
2
IN
V
input which is
6
2
2
, V
3
(1)
(2)
,
–9–
Figure 10 shows a typical plot of effective number of bits versus
frequency for an AD7868BQ with a sampling frequency of
83 kHz. The effective number of bits typically falls between 11.7
and 11.85 corresponding to SNR figures of 72.2 and 73.1 dB.
Figure 10. Effective Number of Bits vs. Frequency for the
ADC
DAC Testing
A simplified diagram of the method used to test the dynamic
performance specifications of the DAC is outlined in Figure 11.
Data is loaded to the DAC under control of the microcontroller
and associated logic. The output of the DAC is applied to a 9th
order low-pass filter whose cutoff frequency corresponds to the
Nyquist limit. The output of the filter is in turn applied to a
16-bit accurate digitizer. This digitizes the signal and the micro-
controller generates an FFT plot from which the dynamic per-
formance of the DAC can be evaluated.
11.5
10.5
12
11
10
0
Figure 9. AD7868, ADC FFT Plot
INPUT FREQUENCY – kHz
SAMPLE FREQUENCY = 83 kHz
T
A
= 25 C
AD7868
41.5