ad73311l Analog Devices, Inc., ad73311l Datasheet - Page 29

• Manufacturer Part Number: ad73311l
• Description: Low Cost, Low Power Cmos General Purpose Analog Front End
• Manufacturer: Analog Devices, Inc.

Configuring an AD73311L to Operate in Data Mode
This section describes the typical sequence of control words that
are required to be sent to an AD73311L to set it up for data mode
operation. In this sequence, Registers B, C and A are programmed
before the device enters data mode. This description panel refers
to Table XIX.
At each sampling event, an SDOFS pulse will be observed that
will cause a control (programming) word to be sent to the device
from the DSP.
Step 1: The first output sample event following device reset.
The SDOFS signal is raised, which prepares the DSP Rx
Register to accept the ADC word from the AD73311L. As the
AD73311L’s SDOFS is coupled to the DSP’s TFS and RFS, and
to the SDIFS of the AD73311L, this event also forces a new con-
trol word to be output from the DSP Tx Register to the AD73311L.
Step 2: We observe the status of the channel following the
transmission of the control word. The DSP has received the
ADC word (invalid because the ADC is not yet powered up)
from the AD73311L and the AD73311L has received the control
word destined for Control Register B. At this stage, the eight LSBs
of the control word are loaded to Control Register B, which sets
the internal MCLK divider ratio to 1, SCLK rate to DMCLK/8.
Step
1
2
3
4
5
6
7
8
9
10
DSP Tx
1000000100001011
1000001011111001
1000001011111001
1000000000000001
1000000000000001
DAC WORD N
DAC WORD N
DAC WORD N+1
DAC WORD N+1
DAC WORD N+2
APPENDIX A
Table XIX.
AD73311L
0000000000000000
1000000100001011
1000000100001011
1000001001111001
1000001011111001
1000000000000001
ADC RESULT N
DAC WORD N
ADC RESULT N+1
DAC WORD N+1
Step 3: The next ADC sample event that occurs raises the
SDOFS line of the AD73311L. The DSP Tx Register contains
the control word to be written to the AD73311L.
Step 4: Following transmission of the control word, the DSP
Rx Register contains the ADC word that during Program Mode
is a copy of the control word written at the previous sampling
interval where the device address field (Bits 13–11) have been
decremented from 000b to 111b. The AD73311L has received a
control word that is addressed to Control Register C, which turns
on power to the ADC, DAC, REFCAP and buffered REFOUT.
Steps 5 and 6: The programming phase is completed by send-
ing a control word addressed to Control Register A, which sets
the device in Data Mode.
Step 7: The AD73311L provides its first valid ADC sample as
the ADC has been powered up and data mode is enabled. In
data mode all words sent to the device are interpreted as DAC
words. Likewise, all words received from the device are inter-
preted as ADC words.
Step 8: The first DAC word has been transmitted to the device
and is loaded to the internal DAC register.
Steps 9 and 10: Another ADC read and DAC write cycle.
DSP Rx
xxxxxxxxxxxxxxxx
0000000000000000
xxxxxxxxxxxxxxxx
1011100100001011
xxxxxxxxxxxxxxxx
1011101011111001
xxxxxxxxxxxxxxxx
ADC RESULT N
xxxxxxxxxxxxxxxx
ADC RESULT N+1
AD73311L