ad7397anz Analog Devices, Inc., ad7397anz Datasheet - Page 4

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ad7397anz

Manufacturer Part Number
ad7397anz
Description
3 V, Parallel Input Dual 12-bit /10-bit Dacs
Manufacturer
Analog Devices, Inc.
Datasheet
AD7396/AD7397
CS
L
L
L
L
H
H
X
H
^Denotes positive edge. The SHDN pin has no effect on the digital interface data loading; however, while in the SHDN state (SHDN = 0) the output amplifiers V
and V
OUTB
LDA, LDB
D0–D11
A/B
L
H
L
H
X
X
X
X
exhibit an open circuit condition. Note, the LDx inputs are level-sensitive, the respective DAC registers are in a transparent state when LDx = “0.”
V
OUT
A/B
CS
RS
Figure 2. Timing Diagram
LDA
H
H
H
L
L
^
X
X
t
t
CSW
LS
t
t
AS
DS
t
t
t
t
S
DH
AH
LH
LDB
H
H
L
H
L
^
X
X
RS
H
H
H
H
H
H
L
^
t
RSW
t
S
t
LDW
SHDN
X
X
X
X
X
X
X
X
ERROR BAND
1 LSB
Table I. Control Logic Truth
Input Register
Write to B
Write to A
Write to B
Write to A
Latched
Latched
Reset to Zero Scale
Latched to Zero
–4–
DBx
A/B
CS
RS
Figure 3. Digital Control Logic
DAC Register
Latched with Previous Data
Latched with Previous Data
B Transparent
A Transparent
A and B Transparent
Latched with New Data from Input REG
Reset to Zero Scale
Latched to Zero
B REGISTER
1 OF 12
LATCHES
OF THE 2 INPUT
REGISTERS
TO DAC
REGISTERS
REV. 0
OUTA

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