w83195bg-341 Winbond Electronics Corp America, w83195bg-341 Datasheet - Page 17

• Manufacturer Part Number: w83195bg-341
• Description: Winbond Clock Generator For Via P4/kt Series Chipset
• Manufacturer: Winbond Electronics Corp America

7.13 Register 13: Control (Default: 24h)
7.14 Register 14: Control (Default: 56h)
7.15 Register 15: Slew Rate Control (Default: 55h)
BIT
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
CPUCS_S2
CPUCS_S1
SELSD_DD
CSKEW [2]
CSKEW [1]
CSKEW [0]
PCI_64_S2
PCI_64_S1
PCI_31_S2
PCI_31_S1
PSKEW [2]
PSKEW [1]
PSKEW [0]
USB48_S2
USB48_S1
SELP4_K7
PCI_F_S2
PCI_F_S1
INV_AGP
INV_PCI
AGP_S2
AGP_S1
REF_S2
REF_S1
NAME
NAME
NAME
CLOCK GEN. FOR VIA P4/KT SERIES CHIPSET
PWD
PWD
PWD
0
0
1
0
0
1
0
0
X
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Invert the AGP phase 0: Default, 1: Inverse
Invert the PCI phase 0: Default, 1: Inverse
CPU to CPUCS skew control, Skew resolution is 340ps
Expand the skew direction is same as
CPU_CPUCS_SKEW [2:0] setting
CPU to PCI skew control, Skew resolution is 340ps
Expand the skew direction is same as
CPU_PCI_SKEW [2:0] setting
CPUCS_T/C slew rate control
11 : Strong , 00 : Weak , 10/01 : Normal
USB48/DOT48/USB24_48 slew rate control
11 : Strong , 00 : Weak , 10/01 : Normal
AGP2,1,0 slew rate control
11 : Strong , 00 : Weak , 10/01 : Normal
Device active mode selection
1: P4 mode
0: K7 mode
Default value follow hardware trapping data on pin7 SELP4_K7/AGP1
(Default 1)
DRAM module selection
1: SDRAM mode
0: DDR mode
Default
SELSD_DD/PCI1 (Default 0)
PCI_F slew rate control
11: Strong, 00: Weak, 10/01: Normal
PCI6, 5,4 slew rate control
11 : Strong , 00 : Weak , 10/01 : Normal
PCI3, 2,1 slew rate control
11 : Strong , 00 : Weak , 10/01 : Normal
REF0, REF1 slew rate control
11 : Strong , 00 : Weak , 10/01 : Norma
value
- 13 -
follow
FUNCTION DESCRIPTION
FUNCTION DESCRIPTION
FUNCTION DESCRIPTION
hardware
Publication Release Date: March, 2006
trapping
data
on
Revision 1.1
pin11