w83195bg-120 Winbond Electronics Corp America, w83195bg-120 Datasheet - Page 12

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w83195bg-120

Manufacturer Part Number
w83195bg-120
Description
Winbond Clock Generator W83195br-120/w83195bg-120 For Intel 915/945 Chipset
Manufacturer
Winbond Electronics Corp America
Datasheet
7. I2C CONTROL AND STATUS REGISTERS
PWD: Power on default value
7.1
7.2
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Regisbit 0: Frequency Select (Default: 10h)
Register 1: CPU Clock Control (1 = Enable, 0 = Disable) (Default: E2h)
SSEL [4]
SSEL [3]
SSEL [2]
SSEL [1]
SSEL [0]
EN_SSEL
EN_SPSP
EN_SAFE_FREQ
PIN NO
36,35
42,41
45,44
NAME
-
-
-
-
-
PWD
X
X
X
1
1
1
0
0
PWD
0
0
0
1
0
0
0
0
CPUCLK_ITP/PCIEX5 output control
CPUT1 / C1 output control
CPUT0 / C0 output control
Reserved (Read only).
Reserved (Read only).
Power on latched value of FS2 pin, Default: 0 (Read only).
Power on latched value of FS1 pin, Default: 1 (Read only).
Power on latched value of FS0 pin, Default: 0 (Read only).
Frequency selection by software via I
Enable software table selection FS [4:0].
0 = Hardware table setting.
1 = Software table setting through Bit 7~3.
Enable spread spectrum mode at clock outputs
0 = Spread Spectrum mode disable
1 = Spread Spectrum mode enable
After watchdog timeout
0 = Reload the hardware FS [2:0] latched pins setting.
1 = Reload the frequency table selection as defined in Reg-5 Bit 4~0.
W83195BR-120/W83195BG-120
-8-
DESCRIPTION
DESCRIPTION
2
C

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