mc145073 Freescale Semiconductor, Inc, mc145073 Datasheet

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mc145073

Manufacturer Part Number
mc145073
Description
Dual 16-bit Stereo Audio Sigma-delta
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Product Preview
Dual 16-Bit Stereo Audio
Sigma-Delta ADC
CMOS
digital audio systems such as multimedia, DCC, DAT, and professional audio
applications. It uses a sigma–delta architecture consisting of a second–order
analog modulator and two stages of digital filtering for each channel. The
analog modulator samples the input signal at 128 times the output data rate,
performs a single–bit quantization, and shapes the quantization noise towards
higher frequencies. Subsequent on–chip digital filters reject most of the shaped
quantization noise and lower the data rate.
compatible with a multitude of application interfacing requirements. A single 5 V
supply and a power–down mode reduce power supply requirements, making
the part attractive for portable applications.
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
TMS320 is a trademark of Texas Instruments.
REV 1
5/97
MOTOROLA
MODES
A IN(+R)
A IN(–R)
A IN(+L)
A IN(–L)
The MC145073 is a dual–channel, 16–bit A/D converter intended for use in
Sixteen unique user–selectable interfacing modes make the MC145073
Motorola, Inc. 1997
Single Supply, Operating Voltage Range: 4.5 to 5.5 V
128x OSR Sigma–Delta Modulator
82 dB Typical S/(N+D)
Analog Inputs Can Be Driven as Either Differential or Single–Ended
Clock Input May Be 128x, 256x, or 384x the Output Data Rate
Out–of–Range Input Signals Internally Limited
On–Chip Digital Filters:
User–Selectable Digital Filter Transition Bands
Versatile Serial Digital Output Interface:
Power–Down Mode Consumption: 2.0 mW
Operating Temperature Range: – 40 to 85 C
CLK
IN
5th Order Decimate–by–32 Comb Filter
121 Tap Decimate–by–4 FIR Filter
Configurable as Master or Slave
Data Can Be Either Left– or Right–Justified
Interfaces to DSP56000/1 and TMS320
I 2 S or Japanese Interface Compatibility
CS5326 Compatible Interface Mode
Multiplexing of Two MC145073s Accommodated
REFERENCE
VOLTAGE
MODULATOR
MODULATOR
CLK DIVIDERS/DRIVER
AND CONTROL LOGIC
COMB FILTER
COMB FILTER
DSPs
FIR FILTER
FIR FILTER
INTERFACE
DIGITAL
24
ORDERING INFORMATION
MC145073DW SOG Package
A IN(+L)
V DD(D)
A IN(–L)
V DD(A)
V SS(D)
VSS(A)
MC145073
SYNC
SCLK
REF
SUB
FTP
FTP
1
PIN ASSIGNMENT
SERIAL
INTERFACE
1
2
3
4
5
6
7
8
9
10
11
12
SOG PACKAGE
Order this document
DW SUFFIX
CASE 751E
24
23
22
21
20
19
18
17
16
15
14
13
by MC145073/D
A IN(+R)
A IN(–R)
V AG
CSEL0
CSEL1
FSEL
I SYNC
I SLAV
I JUST
I DOE
CLK
SDO
MC145073
1

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mc145073 Summary of contents

Page 1

... Dual 16-Bit Stereo Audio Sigma-Delta ADC CMOS The MC145073 is a dual–channel, 16–bit A/D converter intended for use in digital audio systems such as multimedia, DCC, DAT, and professional audio applications. It uses a sigma–delta architecture consisting of a second–order analog modulator and two stages of digital filtering for each channel. The analog modulator samples the input signal at 128 times the output data rate, performs a single– ...

Page 2

... Maximum Digital Power Supply Current, Power–Down I DDu(A) Maximum Analog Power Supply Current, Operating I DDd(A) Maximum Analog Power Supply Current, Power–Down P O Power Consumption, Operating P pd Power Consumption, Power–Down Cin Maximum Input Capacitance MC145073 2 Value Unit 6 SS(A) – 0 DD( ...

Page 3

... Filter Bandwidth, where ...). Max Unit Bits ppm Unit Notes kHz dB kHz Out CLKS 3 Out CLKS 3 kHz dB kHz Out CLKS 3 Out CLKS 3 MC145073 3 ...

Page 4

... V DD(A) V DD( – IN( DD(A) V DD( – IN( DD( NOTES: 1. Analog signals A IN(L) and A IN(R) are floating drivers. R OUT of source equal resistors. 2. U1, U2 — MC33077. MC145073 U1B – 7 U1A U2B – 7 U2A 5 + Figure 1. Input Buffer–Driver A OUT(+L) A OUT(– ...

Page 5

... REF 0.1 F Figure 2. MC145073 A/D Application Circuit * For best performance A IN(+ IN(–L) and A IN(+ IN(–R) should be differentially driven. A IN(+ IN(+R) (and A IN(– IN(–R) ) can be grounded for single ended configuration. Circuit in Figure 1 depicts input buffer circuit. MOTOROLA V DD(A) V DD( ...

Page 6

... OUTPUT FIR FILTER OUTPUT 100 125 150 175 TIME (OUTPUT CLOCKS) MC145073 6 MAXIMUM ALIAS = – 87.5884 db AT 169.125 kHz 0 – OUTPUT DATA RATE = 44.1 kHz, FSEL = HIGH CLKI = 6.144 MHz DIGITAL FILTER RESPONSE (20 – 24 kHz TRANSITION BAND – 20 – ...

Page 7

... MC145073 7 ...

Page 8

... Figure 8. Serial Interface Timing (Master Mode: I SLAV = 0) CLK/1 CLK/2 CLK/3 t sclkh SCLK SDO SYNC Figure 9. Serial Interface Timing (Slave Mode: I SLAV = 1) NOTE: CLK signals shown above represent the external clock at three different frequencies. MC145073 8 SYNC t wcl t CSC CDV t CSY sclkl ...

Page 9

... Serial Interface Data Output (Pin 13) The A/D conversion results for the left and right channels are output on this pin. Data is shifted out of the MC145073 MSB first, with the left channel data preceding the right chan- nel data. The serial output data is clocked out on the rising edge of SCLK ...

Page 10

... Analog input sig- nals that exceed the differential analog input voltage range of 3.8 V p–p are clipped in order to prevent overflow of the digi- tal filters. The MC145073 operates from a single 5 V power supply. For portable or other low power applications, a pow- er–down mode is available. ...

Page 11

... MC145073 as a master tied to a second MC145073 operating as a slave due to the reclock- ing of the SYNC and SCLK inputs in the slave mode (see Operation with the MC145073 as a Slave (I SLAV = 1) sec- tion). NOTE When multiplexing two MC145073 devices, all four analog channels are sampled at exactly the same phase ...

Page 12

... When I SLAV = 1 the SYNC and SCLK signals are defined as inputs, and the MC145073 is configured as a slave de- vice. However, the slave mode of the MC145073 is not a true slave mode since the SYNC and SCLK inputs are reclocked by the internal sample clock, CLKI. These internal reclocked versions of SYNC and SCLK are shown in Figure 11, in addi- tion to the external SYNC and SCLK signals ...

Page 13

... Figure 10. Serial Interface Operation with MC145073 Configured as Master (I SLAV = 0) MOTOROLA 0 = IJUST 1 = IJUST MC145073 13 ...

Page 14

... Figure 11. Serial Interface Operation with MC145073 Configured as Slave (I SLAV = 1) MC145073 ISYNC 1 = ISYNC 0 = IJUST 1 = IJUST MOTOROLA ...

Page 15

... PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS INCHES DIM MIN MAX MIN MAX A 15.25 15.54 0.601 0.612 B 7.40 7.60 0.292 0.299 C 2.35 2.65 0.093 0.104 D 0.35 0.49 0.014 0.019 F 0.41 0.90 0.016 0.035 G 1.27 BSC 0.050 BSC J 0.23 0.32 0.009 0.013 K 0.13 0.29 0.005 0.011 10.05 10.55 0.395 0.415 R 0.25 0.75 0.010 0.029 MC145073 15 ...

Page 16

... Motorola, Inc. Motorola, Inc Equal Mfax is a trademark of Motorola, Inc. JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 4–32–1, Nishi–Gotanda, Shinagawa–ku, Tokyo 141, Japan. 81–3–5487–8488 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, MC145073/D MOTOROLA ...

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