ad1864p-j Analog Devices, Inc., ad1864p-j Datasheet - Page 6

• Manufacturer Part Number: ad1864p-j
• Description: Complete Dual 18-bit Audio Dac
• Manufacturer: Analog Devices, Inc.

AD1864
GROUNDING RECOMMENDATIONS
The AD1864 has three ground pins, two labeled AGND and
one labeled DGND. AGND, the analog ground pins, are the
“high quality” ground references for the device. To minimize
distortion and reduce crosstalk between channels, the analog
ground pins should be connected together only at the analog
common point in the system. As shown in Figure 7, the AGND
pins should not be connected at the chip.
The digital ground pin returns ground current from the digital
logic portions of the AD1864 circuitry. This pin should be
connected to the digital common pin in the system. Other
digital logic chips should also be referred to that point. The
analog and digital grounds should be connected together at one
point in the system, preferably at the power supply.
POWER SUPPLIES AND DECOUPLING
The AD1864 has four power supply pins. V
supply voltages that operate the analog portions of the DAC,
including the voltage references, output amplifiers and control
amplifiers. The V
to 12 V. These supplies should be decoupled to analog
common using 0.1 F capacitors. Good engineering practice
suggests that the bypass capacitors be placed as close as possible
to the package pins. This minimizes the parasitic inductive
effects of printed circuit board traces.
The V
including the input shift registers and the input latching
circuitry. These supplies should be bypassed to digital common
using 0.1 F capacitors. V
supplies. In order to assure proper operation of the AD1864,
–V
S
–ANALOG
must be the most negative power supply voltage at all times.
SUPPLY
DIGITAL
SUPPLY
Figure 7. Recommended DIP Circuit Schematic
V
L
OUT
supplies operate the digital portions of the chip,
S
supplies are designed to operate from 5 V
10
12
11
1
2
3
4
5
6
7
8
9
I
MSB
SJ
R
V
AGND
+V
DR
TRIM
LR
CLK
–V
OUT
OUT
F
L
L
AD1864
S
operates with 5 V to 12 V
AGND
DGND
TRIM
MSB
V
I
–V
+V
OUT
OUT
SJ
R
LL
DL
S
F
L
24
23
22
20
19
18
17
16
15
14
13
21
S
provides the
DIGITAL
COMMON
V
ANALOG
SUPPLY
–DIGITAL
SUPPLY
OUT
–6–
Though separate positive and negative power supply pins are
provided for the analog and digital portions of the AD1864, it is
also possible to use the AD1864 in systems featuring a single
positive and a single negative power supply. In this case, the
+V
power supply. –V
negative supply. This feature allows reduction of the cost and
complexity of the system power supply.
As with most linear circuits, changes in the power supplies will
affect the output of the DAC. Analog Devices recommends that
well regulated power supplies with less than 1% ripple be
incorporated into the design of an audio system.
DISTORTION PERFORMANCE AND TESTING
The THD+N figure of an audio DAC represents the amount of
undesirable signal produced during reconstruction and playback
of an audio waveform. The THD+N specification, therefore,
provides a direct method to classify and choose an audio DAC
for a desired level of performance. Figure 1 illustrates the typical
THD+N performance of the AD1864 versus frequency. A load
impedance of at least 1.5 k is recommended for best THD+N
performance.
Analog Devices tests and grades all AD1864s on the basis of
THD+N performance. During the distortion test, a high speed
digital pattern generator transmits digital data to each channel
of the device under test. Eighteen-bit data is latched into the
DAC at 352.8 kHz (8 F
sine wave with 0 dB, –20 dB and –60 dB amplitudes. A 4096
point FFT calculates total harmonic distortion + noise,
signal-to-noise ratio, D-Range and channel separation. No
deglitchers or MSB trims are used.
OPTIONAL MSB ADJUSTMENT
Use of optional adjust circuitry allows residual distortion error
to be eliminated. This distortion is especially important when
low amplitude signals are being reproduced. The MSB adjust
circuitry is shown in Figure 8. The trim pot should be adjusted
to produce the lowest distortion using an input signal with a
–60 dB amplitude.
S
and +V
200k
Figure 8. Optional DIP THD+N Adjust Circuitry
100k
L
input pins should be connected to the positive
S
470k
and –V
10
12
11
1
2
3
4
5
6
7
8
9
S
L
). The test waveform is a 990.5 kHz
I
SJ
V
MSB
R
AGND
+V
DR
LR
CLK
should be connected to the single
TRIM
–V
OUT
OUT
F
AD1864
L
S
AGND
DGND
TRIM
V
MSB
I
–V
+V
OUT
OUT
DL
LL
SJ
R
S
F
L
24
23
22
20
19
18
17
16
15
14
13
21
470k
100k
200k
REV. A