adv7181c Analog Devices, Inc., adv7181c Datasheet
adv7181c
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adv7181c Summary of contents
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... HD and SMPTE standards. Graphics digitization is also supported by the ADV7181C capable of digitizing RGB graphics signals from VGA to SXGA rates and converting them into a digital DDR RGB or YCrCb pixel output stream. ...
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... ADV7181C TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Functional Block Diagram .............................................................. 3 Specifications ..................................................................................... 4 Electrical Characteristics ............................................................. 4 Video Specifications ..................................................................... 5 Timing Characteristics ................................................................ 6 Analog Specifications ................................................................... 7 Absolute Maximum Ratings ............................................................ 8 Package Thermal Performance ................................................... 8 Thermal Specifications ................................................................ 8 ESD Caution .................................................................................. 8 Pin Configuration and Function Descriptions ............................. 9 Detailed Functionality ................................................................... 11 Analog Front End ....................................................................... 11 REVISION HISTORY 8/08— ...
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... FUNCTIONAL BLOCK DIAGRAM FORMATTER AND FIFO OUTPUT Figure 1. Rev Page ADV7181C 07513-001 ...
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... ADV7181C SPECIFICATIONS ELECTRICAL CHARACTERISTICS AVDD = 3. 3.45 V, DVDD = 1. 2.0 V, DVDDIO = 3 3.6 V, PVDD = 1. 1.89 V, nominal input range 1 −40°C to +85°C, unless otherwise noted. MIN MAX Table Parameter 3, 4 STATIC PERFORMANCE Resolution (each ADC) Integral Nonlinearity Differential Nonlinearity 5 DIGITAL INPUTS ...
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... CVBS input, modulated 5 step DG CVBS input, modulated 5 step LNL CVBS input, 5 step Luma ramp Luma flat field HUE CL_AC CVBS input CVBS input Rev Page ADV7181C −40°C to +85°C, MIN MAX Min Typ Max Unit 0.5 Degrees 0 ...
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... ADV7181C TIMING CHARACTERISTICS AVDD = 3. 3.45 V, DVDD = 1. 2.0 V, DVDDIO = 3 3.6 V, PVDD = 1. 1. unless otherwise noted. Table Parameter SYSTEM CLOCK AND CRYSTAL Crystal Nominal Frequency Crystal Frequency Stability 3 LLC Frequency Range PORT SCLK Frequency SCLK Min Pulse Width High ...
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... SCART RGB input ( signals) S-Video input (Y signal) S-Video input (C signal) Component input (Y, Pr, Pb signals) PC RGB input ( signals) SDP only SDP only SDP only SDP only Rev Page ADV7181C −40°C to +85°C, MIN MAX Typ Max Unit 0.1 μF 10 MΩ ...
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... ADV7181C ABSOLUTE MAXIMUM RATINGS Table 5. Parameter AVDD to AGND DVDD to DGND PVDD to AGND DVDDIO to DGND DVDDIO to AVDD PVDD to DVDD DVDDIO to PVDD DVDDIO to DVDD AVDD to PVDD AVDD to DVDD Digital Inputs Voltage to DGND Digital Outputs Voltage to DGND Analog Inputs to AGND Operating Temperature Maximum Junction Temperature (T ...
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... Control Port 0x42 and the readback address for VBI Port 0x23. Rev Page CAPC2 44 AGND 43 CML 42 REFOUT 41 AVDD 40 39 CAPY2 38 CAPY1 37 AGND address for the ADV7181C control and VBI readback ADV7181C ...
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... CS input signal used to extract timing in a 5-wire or 4-wire RGB mode Input Signal. Used in CP mode for 5-wire timing mode. I Sync on Green/Sync on Luma Input. Used in embedded synchronization mode Logic 0 on this pin places the ADV7181C in a power-down mode. No Connect. These pins are not connected internally. Rev Page ...
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... GemStar™ 1×/2× electronic program guide • Clocked from a single 28.63636 MHz crystal • Subcarrier frequency lock (SFL) output for downstream video encoder • Differential gain typically 0.5% • Differential phase typically 0.5° Rev Page ADV7181C ...
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... RGB graphics supported on 12-bit DDR format GENERAL FEATURES General features of the ADV7181C include HS/CS, VS, and FIELD/DE output signals with programmable position, polarity, and width as well as a programmable interrupt request output pin, INT , that signals SDP/CP status changes. Other features are • ...
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... Component video standards supported by the CP are 525i, 625i, 525p, 625p, 720p, 1080i, graphics up to SXGA at 60 Hz, and many other standards. The CP section of the ADV7181C contains an AGC block. When no embedded synchronization is present, the video gain can be set manually. The AGC section is followed by a digital clamp circuit that ensures the video signal is clamped to the correct blanking level ...
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... ADV7181C ANALOG INPUT MUXING The ADV7181C has an integrated analog muxing section that allows more than one source of video signal to be connected to the decoder. Figure 3 outlines the overall structure of the input muxing provided in the ADV7181C. ADC_SW_MAN_EN 1 ADC0_SW[3: ...
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... On the ADV7181C recommended to use the ADC mapping shown in Table 8. Table 8. Recommended ADC Mapping Mode Required ADC Mapping CVBS ADC0 YC/YC auto Y = ADC0 C = ADC1 Component YUV Y = ADC0 U = ADC2 V = ADC1 Component YUV Y = ADC0 U = ADC2 V = ADC1 SCART RGB CBVS = ADC0 G = ADC1 B = ADC3 R = ADC2 Graphics ...
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... ADV7181C PIXEL OUTPUT FORMATTING Table 10. Pixel Output Formats Pixel Port Pins P[19:0] Processor, Format, and Mode Video output SDP YCrCb[7:0] 8-bit 4:2:2 Video output SDP YCrCb[9:0] 10-bit 4:2:2 Video output SDP Y[7:0] 16-bit 4:2:2 Video output SDP Y[9:0] 20-bit 4:2 Video output 12-bit 4:4:4 B[7]↑ ...
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... RECOMMENDED EXTERNAL LOOP FILTER COMPONENTS The external loop filter components for the ELPF pin should be placed as close as possible to the respective pins. Figure 4 shows the recommended component values. ELPF 30 1.69kΩ 10nF 82nF PVDD = 1.8V Figure 4. ELPF Components Rev Page ADV7181C ...
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... ADV7181C TYPICAL CONNECTION DIAGRAM Figure 5. ADV7181C Typical Connection Rev Page 07513-005 ...
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... Rev Page 12.20 12.00 SQ 11. 10.20 TOP VIEW 10.00 SQ (PINS DOWN) 9. 0.27 0.22 0.17 0.60 MAX PIN 1 INDICATOR 64 1 7.25 EXPOSED PAD 7.10 SQ (BOTTOM VIEW) 6. 0.25 MIN 7.50 REF FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. Package Option CP-64-3 CP-64-3 ST-64 ST-64 CP-64-3 CP-64-3 ST-64 ST-64 ADV7181C ...
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... ADV7181C 2 Purchase of licensed I C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I 2 Rights to use these components system, provided that the system conforms to the I ©2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners ...