xc3s1400an Xilinx Corp., xc3s1400an Datasheet - Page 26

• Manufacturer Part Number: xc3s1400an
• Description: Spartan-3an Fpga Family Data Sheet
• Manufacturer: Xilinx Corp.

DC and Switching Characteristics
Table 21: Setup and Hold Times for the IOB Input Path (Continued)
26
T
Hold Times
T
T
IOPICKD
IOICKP
IOICKPD
Symbol
Time from the setup of data at the
Input pin to the active transition at the
ICLK input of the Input Flip-Flop (IFF).
The Input Delay is programmed.
Time from the active transition at the
ICLK input of the Input Flip-Flop (IFF)
to the point where data must be held
at the Input pin. No Input Delay is
programmed.
Time from the active transition at the
ICLK input of the Input Flip-Flop (IFF)
to the point where data must be held
at the Input pin. The Input Delay is
programmed.
Description
LVCMOS25
LVCMOS25
LVCMOS25
Conditions
www.xilinx.com
(2)
(2)
(2)
DELAY_
VALUE
IFD_
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
XC3S700AN
XC3S1400AN
XC3S50AN
XC3S200AN
XC3S400AN
XC3S700AN
XC3S1400AN
XC3S50AN
XC3S200AN
Device
DS557-3 (v3.1) June 2, 2008
–0.66
–0.85
–0.42
–0.81
–0.71
–0.88
–1.33
–2.05
–2.43
–2.34
–2.81
–3.03
–3.83
–1.51
–2.09
–2.40
–2.68
–2.56
–2.99
–3.29
–3.61
1.82
2.62
3.32
3.83
3.69
4.60
5.39
5.92
1.79
2.55
3.38
3.75
3.81
4.39
5.16
5.69
Min
Speed Grade
-5
Product Specification
–2.09
–0.64
–0.65
–0.42
–0.67
–0.71
–0.88
–1.33
–2.05
–2.43
–2.34
–2.81
–3.03
–3.57
–1.51
–2.40
–2.68
–2.56
–2.99
–3.29
–3.61
1.95
2.83
3.72
4.31
4.14
5.19
6.10
6.73
2.17
2.92
3.76
4.32
4.19
5.09
5.98
6.57
Min
-4
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R