cy8c20436an-24lqxit Cypress Semiconductor Corporation., cy8c20436an-24lqxit Datasheet
cy8c20436an-24lqxit
Manufacturer Part Number
cy8c20436an-24lqxit
Description
Capsense Applications
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
1.CY8C20436AN-24LQXIT.pdf
(46 pages)
Features
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Cypress Semiconductor Corporation
Document Number: 001-54459 Rev. *D
1.71 V to 5.5 V operating range
Low power CapSense
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Powerful Harvard architecture processor
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Flexible on-chip memory
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Full Speed USB
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Precision, programmable clocking
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Programmable pin configurations
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Configurable capacitive sensing elements
Supports combination of CapSense buttons, sliders,
touchpads, touchscreens, and proximity sensors
M8C CPU speed can be up to 24 MHz or sourced by an
external crystal, resonator, or clock signal
Low power at high speed
Interrupt controller
Temperature range: -40 C to +85 C
Three program/data storage size options:
• CY8C20x36A: 8K Flash / 1K SRAM
• CY8C20x46A, CY8C20x96A: 16K Flash/2K SRAM
• CY8C20x66A: 32K Flash/2K SRAM
50,000 Flash Erase/Write cycles
Partial Flash updates
Flexible protection modes
In-System Serial Programming (ISSP)
Available on CY8C20646A, CY8C20666A, CY8C20x96A
only
12 Mbps USB 2.0 compliant
Eight unidirectional endpoints
One bidirectional control endpoint
Dedicated 512 byte buffer
Internally regulated at 3.3V
Internal Main Oscillator (IMO): 6/12/24 MHz ± 5%
Internal Low Speed Oscillator (ILO) at 32 kHz for Watchdog
and Sleep Timers
Precision 32 kHz oscillator for optional external crystal
0.25% accuracy for USB with no external components
(CY8C20646A, CY8C20666A, CY8C20x96A only)
Up to 36 general purpose I/Os (GPIOs) (depending on
package)
Dual mode GPIO: All GPIOs support digital I/O and analog
inputs
25 mA sink current on each GPIO
• 120 mA total sink current on all GPIOs
CMOS drive mode – 5 mA source current on ports 0 and 1
and 1 mA on ports 2, 3, and 4
• 20 mA total source current on all GPIOs
Selectable, regulated digital I/O on port 1
Configurable input threshold on port 1
Hot swap capability on all Port 1 GPIO
Pull up, High Z, Open Drain modes on all GPIO
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198 Champion Court
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Versatile analog mux
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Additional system resources
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Complete development tools
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Package options
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Common internal analog bus
Simultaneous connection of I/O
High PSRR comparator
Low dropout voltage regulator for all analog resources
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• Selectable to 50 kHz, 100 kHz, or 400 kHz
• No clock stretching (under most conditions)
• Implementation during sleep modes with less than 100 µA
• Hardware address validation
SPI master and slave: Configurable 46.9 kHz to 12 MHz
Three 16-Bit timers
Watchdog and sleep timers
Internal voltage reference
Integrated supervisory circuit
8 to 10-Bit incremental analog-to-digital converter (ADC)
• Not available on CY8x20xx6AN versions
Two general purpose high speed, low power analog
comparators
Free development tool (PSoC Designer™)
Full featured, In-Circuit Emulator (ICE) and Programmer
Full speed emulation
Complex breakpoint structure
128K trace memory
CY8C20x36A:
• 16-Pin 3 x 3 x 0.6 mm QFN
• 24-Pin 4 x 4 x 0.6 mm QFN
• 32-Pin 5 x 5 x 0.6 mm QFN
• 48-Pin SSOP
• 48-Pin 7 x 7 x 1.0 mm QFN
CY8C20x46A:
• 16-Pin 3 x 3 x 0.6 mm QFN
• 24-Pin 4 x 4 x 0.6 mm QFN
• 30-Ball WLCSP
• 32-Pin 5 x 5 x 0.6 mm QFN
• 48-Pin SSOP
• 48-Pin 7 x 7 x 1.0 mm QFN (with USB)
CY8C20x96A:
• 24-Pin 4 x 4 x 0.6 mm QFN (with USB)
• 32-Pin 5 x 5 x 0.6 mm QFN (with USB)
CY8C20x66A:
• 32-Pin 5 x 5 x 0.6 mm QFN
• 48-Pin 7 x 7 x 1.0 mm QFN (with USB)
• 48-Pin SSOP
• 30-Ball WLCSP
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C Slave:
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San Jose
CapSense
CY8C20X36A/46A/66A/96A
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CA 95134-1709
®
Applications
Revised May 28, 2010
•408-943-2600
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