cy8c20111 Cypress Semiconductor Corporation., cy8c20111 Datasheet - Page 5

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cy8c20111

Manufacturer Part Number
cy8c20111
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
4.5 Circuit-5: Powering Down CapSense Express Device for Low Power Requirements
For low power requirements, if Vdd is to be turned off, the above
concept can be used. The Vdds of CapSense Express, I
ups, and LEDs must be from the same source. Turning off the
Vdd ensures that no signal is applied to the device while it is
unpowered. The I
master in this situation. If a port pin or group of port pins can cater
to the power supply requirement of the circuit, the LDO can be
avoided.
5. Operating Modes
5.1 Normal Mode
In normal mode of operation, the acknowledgment time is
optimized. The timings remain approximately the same for
different configurations of the slave. To reduce the acknowl-
edgment times in normal mode, the registers 0x07, 0x08, 0x11,
0x50, 0x51, 0x5C, 0x5D are given only read access. Writing to
these registers can be done only in setup mode.
5.2 Setup Mode
All registers have read and write access (except those which are
read only) in this mode. The acknowledgment times are longer
compared to normal mode. When CapSense scanning is
disabled (command code 0x0A in command register 0xA0), the
acknowledgment times can be improved to values similar to the
normal mode of operation.
Table 3. I
Document Number: 001-53516 Rev. **
7 Bit Slave Address (in Dec)
2
C Addresses
75
75
1
1
2
C signals should not be driven high by the
Master
Host
Or
Output
enable
D7
0
0
1
1
LDO
D6
0
0
0
0
PRELIMINARY
D5
0
0
0
0
CapSense Express
Output
2
C pull
D4
0
0
1
1
D3
0
0
0
0
6. I
The CapSense Express devices support the industry standard
I
The I
6.1 I
The device uses a seven bit addressing protocol. The I
transfer is always initiated by the master sending one byte
address; first 7-bit contains address and LSb indicates the data
transfer direction. Zero in the LSb indicates the write transaction
form master and one indicates read transfer by the master.
Table 3
2
C protocol, which can be used to:
Configure the device
Read the status and data registers of the device
Control device operation
Execute commands
VDD
2
2
2
C address can be modified during configuration.
D2
C Interface
0
0
1
1
SDA
C Device Addressing
SCL
LED
shows example for different I
D1
1
1
1
1
I2C Pull
0(W)
0(W)
1(W)
1(R)
D0
UPs
CY8C20111, CY8C20121
8 Bit Slave Address (in Hex)
2
BUS
C addresses.
I2C
02
03
96
97
Page 5 of 34
2
C data
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