cy8c9520 Cypress Semiconductor Corporation., cy8c9520 Datasheet

no-image

cy8c9520

Manufacturer Part Number
cy8c9520
Description
20-, 40-, And 60-bit I/o Expander With Eeprom
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
cy8c9520-24PVXI
Manufacturer:
CY
Quantity:
5
Part Number:
cy8c9520A-24PVXI
Manufacturer:
LT
Quantity:
1 378
Part Number:
cy8c9520A-24PVXI
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
CY8C9520,
CY8C9540, and CY8C9560
20-, 40-, and 60-Bit I/O Expander with EEPROM
Features
Figure 1-1. Top Level Block Diagram
August 17, 2005
Cypress Semiconductor
SCL
SDA
V
V
I2C™ interface logic electrically compatible with SMBus.
Up to 20 (CY8C9520), 40 (CY8C9540) or 60 (CY8C9560)
I/O data pins independently configurable as inputs, outputs,
bi-directional input/outputs or PWM outputs.
4/8/16 PWM sources with 8-bit resolution.
Extendable Soft Addressing™ algorithm allowing flexible
I2C-address configuration.
Internal 3-/11-/27-Kbyte EEPROM.
Storage of user defaults and I/O port settings in the internal
EEPROM.
Optional EEPROM Write Disable (WD) input.
Interrupt output indicates input pin level changes and pulse
width modulator (PWM) state changes.
Internal power-on reset (POR).
dd
ss
24 MHz
32 kHz
Divider (1-255)
93.75 kHz
Clocks
1.5 MHz
PWM 15
PWM 0
Pow er-on-Reset
WD
© Cypress Semiconductor Corp. 2005 — Document No. 38-12036 Rev. *A
Settings
User
Area
EEPROM
Control
Unit
Available
User
Area
GPort 0
GPort 1
GPort 2
GPort 3
GPort 7
4 Bit I/O
or A1-A3, W
A0
8 Bit I/O
3 Bit I/O
or A4-A6
8 Bit I/O
5 Bit I/O
8 Bit I/O
INT
Overview
The CY8C95xx is a multi-port I/O expander with on-board user-
available EEPROM and several PWM outputs. All devices in
this family operate identically but differ in I/O pins, number of
PWMs, and internal EEPROM size.
The CY8C95xx operates as two I2C slave devices. The first
device is a multi-port I/O expander (single I2C address to
access all ports via registers). The second device is a serial
EEPROM. Dedicated configuration registers can be used to dis-
able the EEPROM. The EEPROM utilizes 2-byte addressing to
support the 28-Kbyte EEPROM address space. The selected
device is defined by the most significant bits of the I2C address
or by specific register addressing.
The I/O expander's data pins can be independently assigned as
inputs, outputs, quasi-bidirectional input/outputs or PWM
ouputs. The individual data pins can be configured as open
drain/collector, strong drive (10 mA source, 25 mA sink), resis-
tively pulled-up/-down, or high-impedance. The factory default
configuration is pulled-up internally.
The system master writes to the I/O configuration registers via
the I2C bus. Configuration and output register settings can be
stored as user defaults in a dedicated section of the EEPROM.
If user defaults have been stored in EEPROM, they are
restored to the ports at power-up. While this device can share
the bus with SMBus devices, it can only communicate with
I2C-masters.
There is one dedicated pin that is configured as an interrupt out-
put (INT) and can be connected to the interrupt logic of the sys-
tem master. This signal can inform the system master that there
is incoming data on its ports or that the PWM output state was
changed.
The EEPROM is byte-readable and supports byte-by-byte writ-
ing. A pin can be configured as an EEPROM Write Disable
(WD) input that blocks write operations when set high. The con-
figuration registers can also disable EEPROM operations.
The CY8C95xx has one fixed address pin (A0) and up to six
additional pins (A1-A6) which allow up to 128 devices to share a
common two-wire I2C data bus. The Extendable Soft Address-
ing algorithm provides the option to choose the number of pins
needed to assign the desired address. Pins not used for
address bits are available as GPIO pins.
Preliminary Data Sheet
1

Related parts for cy8c9520

cy8c9520 Summary of contents

Page 1

... CY8C9540, and CY8C9560 20-, 40-, and 60-Bit I/O Expander with EEPROM Features I2C™ interface logic electrically compatible with SMBus (CY8C9520), 40 (CY8C9540 (CY8C9560) I/O data pins independently configurable as inputs, outputs, bi-directional input/outputs or PWM outputs. 4/8/16 PWM sources with 8-bit resolution. Extendable Soft Addressing™ algorithm allowing flexible I2C-address configuration ...

Page 2

... CY8C95xx Preliminary Data Sheet There are 4 (CY8C9520), 8 (CY8C9540 (CY8C9560) independently configurable 8-bit PWMs. These PWMs are denoted as PWM0-PWM15. Each PWM can be clocked by one of six available clock sources. Architecture The figure titled “Top Level Block Diagram” on page 1 the device block diagram. The main blocks include the control unit, PWMs, EEPROM and I/O ports ...

Page 3

CY8C95xx Preliminary Data Sheet Device Access Addressing Following a start condition, the I2C master device sends a byte to address an I2C slave. This address selects the device to be accessed in the CY8C95xx. By default there are two possible ...

Page 4

CY8C95xx Preliminary Data Sheet Document Conventions Acronyms The following table lists the acronyms that are used in this doc- ument. Acronym Description AC alternating current DC direct current EEPROM electrically erasable programmable read-only memory (E GPIO general purpose IO I/O ...

Page 5

... Supply voltage. dd August 17, 2005 Description GPort0_Bit0_PWM3 GPort0_Bit1_PWM1 GPort0_Bit2_PWM3 GPort0_Bit3_PWM1 GPort0_Bit4_PWM3 GPort0_Bit5_PWM1 GPort0_Bit6_PWM3 GPort0_Bit7_PWM1 I2C Serial Clock (SCL) I2C Serial Clock (SDA) GPort2_Bit3_PWM3/A1 2 Write Disable. Document No. 38-12036 Rev. *A CY8C9520 28-Pin Device Vdd GPort1_Bit0_PWM2 3 26 GPort1_Bit1_PWM0 4 25 GPort1_Bit2_PWM2 GPort1_Bit3_PWM0 ...

Page 6

CY8C95xx Preliminary Data Sheet 2.1.2 48-Pin Part Pinout Table 2-2. 48-Pin Part Pinout (SSOP) Pin Pin Name No. 1 GPort0_Bit0_PWM7 Port 0, Bit 0, PWM 7. 2 GPort0_Bit1_PWM5 Port 0, Bit 1, PWM 5. 3 GPort0_Bit2_PWM3 Port 0, Bit 2, ...

Page 7

CY8C95xx Preliminary Data Sheet 2.1.3 100-Pin Part Pinout Table 2-3. 100-Pin Part Pinout (TQFP) Pin Name No. 1 DNU DNU = Do Not Use; leave floating. 2 DNU DNU = Do Not Use; leave floating. 3 GPort0_Bit3_PWM1 Port 0, Bit ...

Page 8

CY8C95xx Preliminary Data Sheet a DNU 1 DNU 2 GPort0_Bit3_PWM1 3 GPort0_Bit4_PWM7 4 GPort0_Bit5_PWM5 5 GPort0_Bit6_PWM3 6 GPort0_Bit7_PWM1 7 GPort3_Bit0_PWM7 8 GPort3_Bit1_PWM5 9 10 GPort3_Bit2_PWM3 GPort3_Bit3_PWM1 11 DNU 12 DNU 13 DNU 14 Vss 15 GPort3_Bit4_PWM15 16 GPort3_Bit5_PWM13 17 GPort3_Bit6_PWM11 ...

Page 9

... POR. August 17, 2005 2.2.5 Working with PWMs There are four independent PWMs in the CY8C9520, eight in the CY8C9540 and sixteen in the CY8C9560. Each I/O pin can be configured as a PWM output by writing ‘1’ to the correspond- ing bit of the Select PWM register (see Select PWM Registers Logic,” on page The next step of PWM configuration is clock source selection using the Config PWM registers ...

Page 10

CY8C95xx Preliminary Data Sheet slave address R High(Addr) start ACK from slave slave address R High(Addr) start ACK from slave ...

Page 11

Register Reference This chapter lists and describes the registers of the CY8C95xx device, starting with a register map and then detailed descriptions of register types. 3.1 Register Mapping Table The register address is auto-incrementing. If the master device writes ...

Page 12

CY8C95xx Preliminary Data Sheet 3.2 Register Descriptions The registers for the CY8C95xx are described in the sections that follow. Note that the PWM registers are located at addresses 28h to 2Bh. 3.2.1 Input Port Registers (00h - 07h) These registers ...

Page 13

CY8C95xx Preliminary Data Sheet 3.2.9 Drive Mode Registers (1Dh-23h) Each port's data pins can be set separately to one of seven available modes: pull-up/-down, open drain high/low, strong drive fast/slow, or high-impedance input. To perform this config- uration, the seven ...

Page 14

... If it seems to be corrupted then factory defaults are loaded and the low nib- ble of this register is set high to inform which set is active. The high nibble is always equal to 2 for CY8C9520, 4 for CY8C9540, and 6 for CY8C9560. This register is read-only. ...

Page 15

CY8C95xx Preliminary Data Sheet Table 3-10. POR Defaults Data Structure Offset 00h – 07h Output Port 0-7 08h – 0Fh Interrupt mask Port 0-7 10h – 17h Select PWM Port 0-7 18h – 1Fh Inversion Port 0-7 20h – 27h ...

Page 16

Electrical Specifications This chapter presents the DC and AC electrical specifications of the CY8C95xx device. For the most up to date electrical specifica- tions, confirm that you have the most recent data sheet by going to the web at ...

Page 17

... The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ T ≤ 85°C, or 3.0V to 3.6V and -40°C ≤ are for design guidance only. Table 4-4: CY8C9520 DC Chip-Level Specifications Symbol Description Vdd Supply Voltage ...

Page 18

CY8C95xx Preliminary Data Sheet 4.3.2 DC Programming Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ T ≤ 85°C, or 3.0V to 3.6V and -40°C ≤ T ...

Page 19

CY8C95xx Preliminary Data Sheet 4.4 AC Electrical Characteristics 4.4.1 AC General Purpose I/O Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ T ≤ 85°C, or 3.0V ...

Page 20

CY8C95xx Preliminary Data Sheet 2 4.4 Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ T ≤ 85°C, or 3.0V to 3.6V and -40°C ...

Page 21

Packaging Information This chapter illustrates the packaging specifications for the CY8C95xx device, along with the thermal impedances for each package, the typical package capacitance on crystal pins, and the solder reflow peak temperature. Important Note Emulation tools may require ...

Page 22

CY8C95xx Preliminary Data Sheet August 17, 2005 Figure 5-2. 48-Lead (300-Mil) SSOP Figure 5-3. 100-Lead ( 1.0 mm) TQFP Document No. 38-12036 Rev Packaging Information 51-85061 - *C 51-85048 - *B 22 ...

Page 23

CY8C95xx Preliminary Data Sheet 5.2 Thermal Impedances Table 5-1. Thermal Impedances per Package Package 28 SSOP 48 SSOP 100 TQFP θ POWER 5.3 Solder Reflow Peak Temperature Following is the minimum ...

Page 24

... Pin (210 Mil) SSOP (Tape and Reel) 48 Pin (300 Mil) SSOP 48 Pin (300 Mil) SSOP (Tape and Reel) 100 Pin TQFP 100 Pin TQFP (Tape and Reel) 6.1 Ordering Code Definitions xxx-SPxx August 17, 2005 CY8C9520-24PVXI 3K CY8C9520-24PVXIT 3K CY8C9540-24PVXI 11K CY8C9540-24PVXIT 11K CY8C9560-24AXI 27K CY8C9560-24AXIT 27K Package Type: ...

Page 25

Sales and Service Information To obtain information about Cypress Semiconductor or sales and technical support, reference the following informationt. Cypress Semiconductor 2700 162nd Street SW, Building D Lynnwood, WA 98087 Phone: 800.669.0557 Facsimile: 425.787.4641 Web Sites: Company Information – ...

Related keywords